Project Information

DESIGN-EID is an innovate programme providing a unique research training opportunity for a cohort of 3 Early Stage Researchers (ESRs) in the novel and multidisciplinary field of semiconductoropto-electronic technology. The DESIGN-EID project offers strategic training opportunities with exceptional prospects for career development in both academia and industry. In the video below, supervisor Dr. Vihar Georgiev gives a short overview of the DESIGN project.

There is a great interest in integrating compound semiconductors either monolithically or heterogeneously on silicon to exploit their complementary properties. Particularly to exploit the direct bandgap of III-Vs for opto-electronic devices densely integrated with CMOS. However, lattice and thermal mismatch between materials makes epitaxial growth on silicon challenging.

In this project we will address the challenges associated with the formation of defects and material growth in compound semiconductors such as III-Vs as well as their impact on device performance. Defects may be exploited in the development of novel devices, but more often we wish to mitigate their deteriorating impact on electro-optic device performance, by growth and materials optimization. The project combines experimental work at IBM Research Zurich (IBM) with modelling and simulation efforts at Device Modelling Group (University of Glasgow) and Synopsys QuantumATK (ATK)