Professor Asen Asenov

  • James Watt Chair in Electrical Engineering (Electronic and Nanoscale Engineering)

telephone: 01413304790
email: Asen.Asenov@glasgow.ac.uk

Research interests

Biography

Asen Asenov (FIEEE, FRSE) received his MSc degree in solid state physics from Sofia University, Bulgaria in 1979 and the PhD degree in physics from The Bulgarian Academy of Science in 1989.

He has ten years of industrial experience as a head of the Process and Device Modelling Group in Institute of Microelectronics, Sofia, developing one of the first integrated process and device CMOS simulators IMPEDANCE. In 1989–1991 he was a Visiting Professor at the Physics Department of Technical University of Munich, Germany. He joined the Department of Electronics and Electrical Engineering at the University of Glasgow in 1991, and served as a Head of Department in 1999-2003.

As a James Watt Professor in Electrical Engineering and a Leader of the Glasgow Device Modelling Group Asenov directs the development of 2D and 3D quantum mechanical, Monte Carlo and classical device simulators and their application in the design of advanced and novel CMOS devices. He has pioneered the simulations of statistical variability in nano-CMOS devices including random dopants, interface roughness and line edge roughness. He has over 550 publications and more than 160 invited talks in the above areas.

http://web.eng.gla.ac.uk/groups/devmod/

Professor Asenov is also a co-founder, CEO and a director of Gold Standard Simulations (GSS) Ltd.

Professor Asenov is a fellow of the Royal Academy of Scotland, an IEEE Fellow and a member of the IEEE Electron Device Society Technology Computer-Aided Design Committee and of the BP Fellowship Committee. He is a co-author of European Nanoelectronics Advisory Council (ENIAC) Strategic Research Agenda (SRA) and acted on behave of EC as and reviewer for more than 15 EC projects and as an evaluator of several FP5, FP6 and FP7 calls. He has been a general chair, co-chair and TPC chair for many international conferences.

Personal Home Page: http://web.eng.gla.ac.uk/groups/devmod/index.php/people/asen-asenov/


Research Interests

Leader of the Device Modeling Group. Research includes

(i) development of advanced drift diffusion, Monte Carlo and quantum transport simulations tools focused on atomic scale CMOS statistical variability and reliability;

(ii) statistical compact model extraction;

(iii) statistical circuit simulations;

(iv) development of nano-bio simulation tools.

 

Expertise

Semiconductors; semiconductor devices; advanced CMOS technology, devices and design.


Grants

Current Grants and Collaborations


Time-Dependent Variability: A test-proven modelling approach for systems verification and power consumption minimization.
EPSRC, £619,031 Jan14-Dec17 (with John More Uni, Liverpool; ARM, CSR and GSS) PI

Resistive switches (RRAM) and memristive behaviour in silicon-rich silicon oxides
EPSRC, £588,644 Mar13-May17 (with UCL, Micron and GSS) PI

SUPERTHEME
EU FP7, £425,000 Aug11-Jul14 (with TU Vienna, AMSL, AMS, GSS) PI

StatDes
SFC, £495,000 Jul11-Jun14 (with Edinburgh Uni, IBM, Wolfson and 12 others) PI

MORDRED
EU FP7, £350,000 May11-Apr15 (with KUL, Belgium TU, Wien, Infineon) PI

TRAMS
EU FP7, £700,000 Mar11-Feb15 (with UCL, London, Infineon) PI


Supervision

  • Anis S M Zain (Self Funded) Simulation of OPC and strain variability (2009– to date)

  • Jie Ding (James Watt scholarship) Nano CMOS reliability (2011– to date)

  • Niza Idris (Self Funded) Simulation of Metal gate variability (2007 – to date)

  • Morgan Kah H Chan (EPSRC project) Simulation of OPC and strain variability (2006 – to date)

  • Negin Moezi (self funded) BSIM compact model extraction (2007 – to date)

  • Daryoosh Dideban (Self Funded) Simulation of OPC and strain variability (2007 – to date)

  • Iain Moore (EPSRC DTA) Simulation of OPC and strain variability (2006 – to date)


Teaching

Electronic Devices 3.


All publications

List by: Type | Date

Jump to: 2017 | 2016 | 2015 | 2014 | 2013 | 2012 | 2011 | 2010 | 2009 | 2008 | 2007 | 2006 | 2005 | 2004 | 2003 | 2002 | 2001 | 2000 | 1999 | 1998 | 1997 | 1996 | 1995 | 1992 | 1990
Number of items: 524.

2017

Al-Ameri, T., Georgiev, V.P. , Adamu-Lema, F. and Asenov, A. (2017) Simulation study of vertically stacked lateral Si nanowires transistors for 5 nm CMOS applications. IEEE Journal of the Electron Devices Society, (doi:10.1109/JEDS.2017.2752465) (Early Online Publication)

Georgiev, V. P. , Mirza, M. M., Dochioiu, A.-I., Lema, F.-A., Amoroso, S. M., Towie, E., Riddet, C., MacLaren, D. A., Asenov, A. and Paul, D. J. (2017) Experimental and simulation study of 1D silicon nanowire transistors using heavily doped channels. IEEE Transactions on Nanotechnology, 16(5), pp. 727-735. (doi:10.1109/TNANO.2017.2665691)

Thirunavukkarasu, V. et al. (2017) Investigation of inversion, accumulation and junctionless mode bulk Germanium FinFETs. Superlattices and Microstructures, (doi:10.1016/j.spmi.2017.07.020) (In Press)

Al-Ameri, T. M. A. and Asenov, A. (2017) Vertically Stacked Lateral Si80Ge20 Nanowires Transistors for 5 nm CMOS Applications. In: Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS 2017), Athens, Greece, 3-5 Apr 2017, pp. 101-104. ISBN 9781509053131 (doi:10.1109/ULIS.2017.7962612)

Medina-Bailon, C., Sadi, T., Sampedro, C., Padilla, J.L., Godoy, A., Donetti, L., Georgiev, V. , Gamiz, F. and Asenov, A. (2017) Assessment of Gate Leakage Mechanism Utilizing Multi-Subband Ensemble Monte Carlo. In: 2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), Athens, Greece, 03-05 Apr 2017, pp. 144-147. ISBN 9781509053148 (doi:10.1109/ULIS.2017.7962585)

Zhang, Z., Zhang, Z., Guo, S., Wang, R., Wang, X., Cheng, B., Asenov, A. and Huang, R. (2017) Comparative Study on RTN Amplitude in Planar and FinFET Devices. In: IEEE Electron Devices Technology and Manufacturing Conference (EDTM 2017), Toyama, Japan, 28 Feb - 2 Mar 2017, pp. 109-110. ISBN 9781509046607 (doi:10.1109/EDTM.2017.7947530)

Lee, J. et al. (2017) Atoms-to-Circuits Simulation Investigation of CNT Interconnects for Next Generation CMOS Technology. In: SISPAD 2017: International Conference on Simulation of Semiconductor Processes and Devices, Kamakura, Japan, 7-9 Sept 2017, (Accepted for Publication)

Duan, M. et al. (2017) Interaction Between Hot Carrier Aging and PBTI Degradation in nMOSFETs: Characterization, Modelling and Lifetime Prediction. In: 2017 IEEE International Reliability Physics Symposium (IRPS), Monterey, CA, USA, 2-6 Apr 2017, XT5.1-XT5.7. (doi:10.1109/IRPS.2017.7936419)

Duan, M. , Zhang, J. F., Ji, Z., Zhang, W. D., Kaczer, B. and Asenov, A. (2017) Key issues and solutions for characterizing hot carrier aging of nanometer scale nMOSFETs. IEEE Transactions on Electron Devices, 64(6), pp. 2478-2484. (doi:10.1109/TED.2017.2691008)

Lee, J. et al. (2017) The Impact of Vacancy Defects on CNT Interconnects: From Statistical Atomistic Study to Circuit Simulations. In: SISPAD 2017: International Conference on Simulation of Semiconductor Processes and Devices, Kamakura, Japan, 7-9 Sept 2017, (Accepted for Publication)

Al-Ameri, T., Georgiev, V. P. , Sadi, T., Wang, Y., Adamu-Lema, F., Wang, X., Amoroso, S. M., Towie, E., Brown, A. and Asenov, A. (2017) Impact of quantum confinement on transport and the electrostatic driven performance of silicon nanowire transistors at the scaling limit. Solid-State Electronics, 129, pp. 73-80. (doi:10.1016/j.sse.2016.12.015)

Lee, J., Sadi, T., Georgiev, V. P. , Todri-Sanial, A. and Asenov, A. (2017) A Hierarchical Model for CNT and Cu-CNT Composite Interconnects: From Density Functional Theory to Circuit-Level Simulations. International Workshop on Computational Nanotechnology, Windermere, UK, 5-9 June 2017. (Unpublished)

Jiang, X., Guo, S., Wang, R., Wang, Y., Wang, X., Cheng, B., Asenov, A. and Huang, R. (2017) New Insights into the Near-Threshold Design in Nanoscale FinFET Technology for Sub-0.2V Applications. In: 2016 IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, USA, 03-07 Dec 2016, 28.4.1-28.4.4. ISBN 9781509039029 (doi:10.1109/IEDM.2016.7838499)

Zhang, Z., Zhang, Z., Wang, R., Jiang, X., Guo, S., Wang, Y., Wang, X., Cheng, B., Asenov, A. and Huang, R. (2017) New approach for understanding “random device physics” from channel percolation perspectives: Statistical simulations, key factors and experimental results. In: 2016 IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, USA, 03-07 Dec 2016, 7.2.1-7.2.4. ISBN 9781509039029 (doi:10.1109/IEDM.2016.7838366)

Sadi, T., Wang, L. and Asenov, A. (2017) Multi-Scale Electrothermal Simulation and Modelling of Resistive Random Access Memory Devices. In: 26th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2016), Bremen, Germany, 21-23 Sept 2016, pp. 33-37. ISBN 9781509007332 (doi:10.1109/PATMOS.2016.7833422)

Adamu-Lema, F., Duan, M. , Navarro, C., Georgiev, V. , Cheng, B., Wang, X., Millar, C., Gamiz, F. and Asenov, A. (2017) Simulation Based DC and Dynamic Behaviour Characterization of Z2FET. In: SISPAD 2017: International Conference on Simulation of Semiconductor Processes and Devices, Kamakura, Japan, 7-9 Sept 2017, (In Press)

Al-Ameri, T., Georgiev, V.P. , Adamu-Lema, F. and Asenov, A. (2017) Position-Dependent Performance in 5 nm Vertically Stacked Lateral Si Nanowires Transistors. International Workshop on Computational Nanotechnology, Windermere, UK, 5-9 June 2017.

Al-Ameri, T., Georgiev, V.P. , Adamu-Lema, F. and Asenov, A. (2017) Variability-aware Simulations of 5 nm Vertically Stacked Lateral Si Nanowires Transistors. International Workshop on Computational Nanotechnology, Windermere, UK, 5-9 June 2017.

Duan, M. , Adamu-Lema, F., Cheng, B., Navarro, C., Wang, X., Georgiev, V. , Gamiz, F., Millar, C. and Asenov, A. (2017) 2D-TCAD Simulation on Retention Time of Z2FET for DRAM Application. In: SISPAD 2017: International Conference on Simulation of Semiconductor Processes and Devices, Kamakura, Japan, 7-9 Sept 2017, (In Press)

Todri-Sanial, A. et al. (2017) A survey of carbon nanotube interconnects for energy efficient integrated circuits. IEEE Circuits and Systems Magazine, 17(2), pp. 47-62. (doi:10.1109/MCAS.2017.2689538)

Wang, X., Georgiev, V. P. , Adamu-Lema, F., Gerrer, L., Amoroso, S. M. and Asenov, A. (2017) TCAD-based design technology co-optimization for variability in nanoscale SOI FinFETs. In: Deleonibus, S. (ed.) Integrated Nanodevice and Nanosystem Fabrication. Series: Pan Stanford series on intelligent nanosystems. Routledge. ISBN 9789814774222 (In Press)

2016

Al-Ameri, T., Georgiev, V.P. , Lema, A., Sadi, T., Towie, E., Riddet, C., Alexander, C. and Asenov, A. (2016) Performance of Vertically Stacked Horizontal Si Nanowires Transistors: A 3D Monte Carlo / 2D Poisson Schrodinger Simulation Study. In: 2016 IEEE Nanotechnology Materials and Devices Conference (NMDC), Toulouse, France, 9-12 Oct 2016, ISBN 9781509043521 (doi:10.1109/NMDC.2016.7777117)

Georgiev, V. P. , Mirza, M. M., Dochioiu, A.-I., Lema, F.-A., Amoroso, S. M., Towie, E., Riddet, C., MacLaren, D. A., Asenov, A. and Paul, D. J. (2016) Experimental and Simulation Study of a High Current 1D Silicon Nanowire Transistor Using Heavily Doped Channels. In: 2016 IEEE Nanotechnology Materials and Devices Conference (NMDC), Toulouse, France, 9-12 Oct 2016, ISBN 9781509043521 (doi:10.1109/NMDC.2016.7777084)

Sadi, T., Towie, E., Nedjalkov, M., Riddet, C., Alexander, C., Wang, L., Georgiev, V. , Brown, A., Millar, C. and Asenov, A. (2016) One-Dimensional Multi-Subband Monte Carlo Simulation of Charge Transport in Si Nanowire Transistors. In: SISPAD 2016: International Conference on Simulation of Semiconductor Processes and Devices, Nuremberg, Germany, 6-8 Sept 2016, pp. 23-26. ISBN 9781509008186 (doi:10.1109/SISPAD.2016.7605139)

Al-Ameri, T., Georgiev, V. P. , Lema, F.-A., Sadi, T., Wang, X., Towie, E., Riddet, C., Alexander, C. and Asenov, A. (2016) Impact of Strain on the Performance of Si Nanowires Transistors at the Scaling Limit: A 3D Monte Carlo/2D Poisson Schrodinger Simulation Study. In: SISPAD 2016: International Conference on Simulation of Semiconductor Processes and Devices, Nuremberg, Germany, 6-8 Sept 2016, pp. 213-216. ISBN 9781509008186 (doi:10.1109/SISPAD.2016.7605185)

Sadi, T., Wang, L. and Asenov, A. (2016) Advanced Simulation of Resistance Switching in Si-rich Silica RRAM Devices. 2016 IEEE Silicon Nanoelectronics Workshop (SNW), Honolulu, HI, USA, 12-13 Jun 2016. ISBN 9781509007264 (doi:10.1109/SNW.2016.7578049)

Duan, M. , Zhang, J. F., Ji, Z., Zhang, W. D., Vigar, D., Asenov, A., Gerrer, L., Chandra, V., Aitken, R. and Kaczer, B. (2016) Insight into electron traps and their energy distribution under positive bias temperature stress and hot carrier aging. IEEE Transactions on Electron Devices, 63(9), pp. 3642-3648. (doi:10.1109/TED.2016.2590946)

Zhang, Z., Zhang, Z., Guo, S., Wang, R., Wang, X., Cheng, B., Asenov, A. and Huang, R. (2016) Investigation on the Amplitude of Random Telegraph Noise (RTN) in Nanoscale MOSFETs: Scaling Limit of “Hole in the Inversion Layer” Model. In: 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Hangzhou, China, 25-28 Oct 2016, pp. 453-455. ISBN 9781467397193 (doi:10.1109/ICSICT.2016.7998949)

Jiang, X., Guo, S., Wang, R., Wang, X., Cheng, B., Asenov, A. and Huang, R. (2016) A device-level characterization approach to quantify the impacts of different random variation sources in FinFET technology. IEEE Electron Device Letters, 37(8), pp. 962-965. (doi:10.1109/LED.2016.2581878)

Al-Ameri, T., Georgiev, V. , Adamu-Lema, F. and Asenov, A. (2016) Influence of Quantum Confinement Effects and Device Electrostatic Driven Performance in Ultra-Scaled SixGe1-x Nanowire Transistors. In: 2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS 2016), Vienna, Austria, 25-27 Jan 2016, pp. 234-237. ISBN 9781467386104 (doi:10.1109/ULIS.2016.7440096)

Asenov, A., Wang, Y., Cheng, B., Wang, X., Asenov, P., Al-Ameri, T. and Georgiev, V.P. (2016) Nanowire transistor solutions for 5nm and beyond. In: 2016 17th International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, USA, 15-16 Mar 2016, pp. 269-274. (doi:10.1109/ISQED.2016.7479212)

Sadi, T., Wang, L., Gao, D., Mehonic, A., Montesi, L., Buckwell, M., Kenyon, A., Shluger, A. and Asenov, A. (2016) Advanced physical modeling of SiOx resistive random access memories. In: International Conference on Simulation of Semiconductor Processes and Devices, Nuremberg, Germany, 06-08 Sep 2016, pp. 149-152. ISBN 9781509008186 (doi:10.1109/SISPAD.2016.7605169)

Wang, L., Sadi, T., Brown, A.R., Nedjalkov, M., Alexander, C., Cheng, B., Millar, C. and Asenov, A. (2016) Simulation Analysis of the Electro-Thermal Performance of SOI FinFETs. In: Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS 2016), Vienna, Austria, 25-27 Jan 2016, pp. 56-59. ISBN 9781467386098 (doi:10.1109/ULIS.2016.7440051)

2015

Donetti, L., Sampedro, C., Gamiz, F., Godoy, A., Garcıa-Ruız, F. J., Towie, E., Georgiev, V. , Amoroso, S. M., Riddet, C. and Asenov, A. (2015) Multi-Subband Ensemble Monte Carlo Simulation of Si Nanowire MOSFETs. In: SISPAD: International Conference on Semiconductor Process and Device Simulations, Washington, DC, USA, 9-11 Sept 2015, pp. 353-356. ISBN 9781467378581 (doi:10.1109/SISPAD.2015.7292332)

Georgiev, V. P. , Amoroso, S. M., Gerrer, L., Adamu-Lema, F. and Asenov, A. (2015) Interplay between quantum mechanical effects and a discrete trap position in ultrascaled FinFETs. In: SISPAD 2015: International Conference on Semiconductor Process and Device Simulations, Washington, DC, USA, 9-11 Sept 2015, pp. 246-249. ISBN 9781467378581 (doi:10.1109/SISPAD.2015.7292305)

Ding, J., Reid, D., Asenov, P., Millar, C. and Asenov, A. (2015) Influence of transistors with BTI-induced aging on SRAM write performance. IEEE Transactions on Electron Devices, 62(10), pp. 3133-3138. (doi:10.1109/TED.2015.2462319)

Wang, X., Cheng, B., Reid, D., Pender, A., Asenov, P., Millar, C. and Asenov, A. (2015) FinFET centric variability-aware compact model extraction and generation technology supporting DTCO. IEEE Transactions on Electron Devices, 62(10), pp. 3139-3146. (doi:10.1109/TED.2015.2463073)

Wang, Y. et al. (2015) Simulation study of the impact of quantum confinement on the electrostatically driven oerformance of n-type nanowire transistors. IEEE Transactions on Electron Devices, 62(10), pp. 3229-3236. (doi:10.1109/TED.2015.2470235)

Gerrer, L., Georgiev, V., Amoroso, S.M., Towie, E. and Asenov, A. (2015) Comparison of Si <100> and <110> crystal orientation nanowire transistor reliability using Poisson–Schrödinger and classical simulations. Microelectronics Reliability, 55(9-10), pp. 1307-1312. (doi:10.1016/j.microrel.2015.06.094)

Wang, L., Brown, A. R., Nedjalkov, M., Alexander, C., Cheng, B., Millar, C. and Asenov, A. (2015) Impact of self-heating on the statistical variability in bulk and SOI FinFETs. IEEE Transactions on Electron Devices, 62(7), pp. 2106-2112. (doi:10.1109/TED.2015.2436351)

Amoroso, S. M., Adamu-Lema, F., Brown, A. R. and Asenov, A. (2015) A mobility correction approach for overcoming artifacts in atomistic drift-diffusion simulation of nano-MOSFETs. IEEE Transactions on Electron Devices, 62(6), pp. 2056-2060. (doi:10.1109/TED.2015.2419815)

Asenov, A., Cheng, B., Wang, X., Brown, A. R., Millar, C., Alexander, C., Amoroso, S. M., Kuang, J. B. and Nassif, S. R. (2015) Variability aware simulation based design- technology cooptimization (DTCO) flow in 14 nm FinFET/SRAM cooptimization. IEEE Transactions on Electron Devices, 62(6), pp. 1682-1690. (doi:10.1109/TED.2014.2363117)

Jiang, X., Wang, J., Wang, X., Wang, R., Cheng, B., Asenov, A., Wei, L. and Huang, R. (2015) New assessment methodology based on energy–delay–yield cooptimization for nanoscale CMOS technology. IEEE Transactions on Electron Devices, 62(6), pp. 1746-1753. (doi:10.1109/TED.2015.2396575)

Georgiev, V. P., Amoroso, S. M., Ali, T. M., Vila-Nadal, L. , Busche, C., Cronin, L. and Asenov, A. (2015) Comparison between bulk and FDSOI POM flash cell: a multiscale simulation study. IEEE Transactions on Electron Devices, 62(2), pp. 680-684. (doi:10.1109/TED.2014.2378378)

Adamu-Lema, F., Wang, X., Amoroso, S.M., Gerrer, L., Millar, C. and Asenov, A. (2015) Comprehensive 'Atomistic' Simulation of Statistical Variability and Reliability in 14 nm Generation FinFETs. In: 20th International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Washington D.C.,USA, 09-11 Sep 2015, pp. 157-160. ISBN 9781467378598

Al-Ameri, T., Wang, Y., Georgiev, V.P., Adamu-Lema, F., Wang, X. and Asenov, A. (2015) Correlation between Gate Length, Geometry and Electrostatic Driven Performance in Ultra-Scaled Silicon Nanowire Transistors. In: 10th IEEE Nanotechnology Materials and Devices Conference (NMDC), Anchorage, AK, USA, 13-16 Sep 2015, pp. 30-34. ISBN 9781467393621 (doi:10.1109/NMDC.2015.7439240)

Georgiev, V. and Asenov, A. (2015) Multi-scale computational framework for evaluating of the performance of molecular based flash cells. Lecture Notes in Computer Science, 8962, pp. 196-203. (doi:10.1007/978-3-319-15585-2_22)

Jiang, X., Wang, X., Wang, R., Cheng, B., Asenov, A. and Huang, R. (2015) Predictive Compact Modeling of Random Variations in FinFET Technology for 16/14nm Node and Beyond. In: International Electron Devices Meeting (IEDM), Washington, D.C., USA, 7-9 Dec 2015, 28.3.1-28.3.4. ISBN 9781467398947 (doi:10.1109/IEDM.2015.7409787)

Sadi, T., Wang, L., Gerrer, L. and Asenov, A. (2015) Physical Simulation of Si-Based Resistive Random-Access Memory Devices. In: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Washington, DC, USA, 9-11 Sep 2015, pp. 385-388. ISBN 9781467378581 (doi:10.1109/SISPAD.2015.7292340)

Sadi, T., Wang, L., Gerrer, L., Georgiev, V. and Asenov, A. (2015) Self-consistent physical modeling of SiOx-based RRAM structures. In: International Workshop on Computational Electronics (IWCE), West Lafayette, IN, USA, 2-4 Sep 2015, pp. 1-4. ISBN 978069251523515 (doi:10.1109/IWCE.2015.7301981)

Wang, J., Xiaobo, J., Wang, X., Wang, R., Cheng, B., Asenov, A., Wei, L. and Huang, R. (2015) Variation-Aware Energy-Delay Optimization Method for Device/Circuit Co-Design. In: China Semiconductor Technology International Conference (CSTIC), Shanghai, China, 15-16 Mar 2015, pp. 1-3. ISBN 9781479972418 (doi:10.1109/CSTIC.2015.7153331)

Wang, L., Sadi, T., Nedjalkov, M., Brown, A.R., Alexander, C., Cheng, B., Millar, C. and Asenov, A. (2015) An Advanced Electro-Thermal Simulation Methodology for Nanoscale Device. In: International Workshop on Computational Electronics (IWCE), West Lafayette, USA, 2-4 Sep 2015, pp. 1-4. (doi:10.1109/IWCE.2015.7301989)

Wang, X., Reid, D., Wang, L., Burenkov, A., Millar, C., Lorenz, J. and Asenov, A. (2015) Hierarchical Variability-Aware Compact Models of 20nm Bulk CMOS. In: 20th International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Washington D.C.,USA, 09-11 Sep 2015, pp. 325-328. ISBN 9781467378598

Wang, X., Wang, Y., Towie, E., Cheng, B., Liu, X. and Asenov, A. (2015) Discrete Dopant Impact on the 7 nm Nanowire Transistor Performance. In: 2015 International Conference on Solid State Devices and Materials (SSDM), Sapporo, Japan, 27-30 Sept 2015, pp. 84-85. (Unpublished)

2014

Amoroso, S. M., Georgiev, V. P., Gerrer, L., Towie, E., Wang, X., Riddet, C., Brown, A. R. and Asenov, A. (2014) Inverse scaling trends for charge-trapping-induced degradation of FinFETs performance. IEEE Transactions on Electron Devices, 61(12), pp. 4014-4018. (doi:10.1109/TED.2014.2363212)

Busche, C. et al. (2014) Design and fabrication of memory devices based on nanoscale polyoxometalate clusters. Nature, 515(7528), pp. 545-549. (doi:10.1038/nature13951) (PMID:25409147)

Adamu-Lema, F., Wang, X., Amoroso, S. M., Riddet, C., Cheng, B., Shifren, L., Aitken, R., Sinha, S., Yeric, G. and Asenov, A. (2014) Performance and variability of doped multithreshold FinFETs for 10-nm CMOS. IEEE Transactions on Electron Devices, 61(10), pp. 3372-3378. (doi:10.1109/TED.2014.2346544)

Duan, M. , Zhang, J. F., Ji, Z., Zhang, W. D., Kaczer, B., Schram, T., Ritzenthaler, R., Groeseneken, G. and Asenov, A. (2014) Development of a technique for characterizing bias temperature instability-induced device-to-device variation at SRAM-relevant conditions. IEEE Transactions on Electron Devices, 61(9), pp. 3081-3089. (doi:10.1109/TED.2014.2335053)

Georgiev, V., Amoroso, S. and Asenov, A. (2014) 3D Multi-Subband Ensemble Monte Carlo Simulator of FinFETs and nanowire transistors. In: 2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Yokohama, Japan, 9-11 Sep 2014,

Gerrer, L., Amoroso, S.M., Hussin, R. and Asenov, A. (2014) RTN distribution comparison for bulk, FDSOI and FinFETs devices. Microelectronics Reliability, 54(9-10), pp. 1749-1752. (doi:10.1016/j.microrel.2014.07.013)

Hussin, R., Amoroso, S. M., Gerrer, L., Kaczer, B., Weckx, P., Franco, J., Vanderheyden, A., Vanhaeren, D., Horiguchi, N. and Asenov, A. (2014) Interplay between statistical variability and reliability in contemporary pmosfets: measurements versus simulations. IEEE Transactions on Electron Devices, 61(9), pp. 3265-3273. (doi:10.1109/TED.2014.2336698)

Wang, X., Reid, D., Wang, L., Burenkov, A., Millar, C., Cheng, B., Lange, A., Lorenz, J., Baer, E. and Asenov, A. (2014) Variability-aware compact model strategy for 20-nm bulk MOSFETs. In: 19th International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Yokohama Japan, 8-11 Sep 2014, pp. 293-296. ISBN 9781479952878

Asenov, A., Adamu-Lema, F., Wang, X. and Amoroso, S. M. (2014) Problems with the continuous doping TCAD simulations of decananometer CMOS transistors. IEEE Transactions on Electron Devices, 61(8), pp. 2745-2751. (doi:10.1109/TED.2014.2332034)

Wang, X., Brown, A. R., Cheng, B., Roy, S. and Asenov, A. (2014) Drain bias effects on statistical variability and reliability and related subthreshold variability in 20-nm bulk planar MOSFETs. Solid-State Electronics, 98, pp. 99-105. (doi:10.1016/j.sse.2014.04.017)

Amoroso, S. M., Gerrer, L., Hussin, R., Adamu-Lema, F. and Asenov, A. (2014) Time-dependent 3-D statistical KMC simulation of reliability in nanoscale MOSFETs. IEEE Transactions on Electron Devices, 61(6), pp. 1956-1962. (doi:10.1109/TED.2014.2318172)

Georgiev, V. P., Markov, S., Vila-Nadal, L. , Busche, C., Cronin, L. and Asenov, A. (2014) Optimization and evaluation of variability in the programming window of a flash cell with molecular metal-oxide storage. IEEE Transactions on Electron Devices, 61(6), pp. 2019-2026. (doi:10.1109/TED.2014.2315520)

Amoroso, S. M., Gerrer, L., Nedjalkov, M., Hussin, R., Alexander, C. and Asenov, A. (2014) Modeling Carrier Mobility in Nano-MOSFETs in the Presence of Discrete Trapped Charges: Accuracy and Issues. IEEE Transactions on Electron Devices, 61(5), pp. 1292-1298. (doi:10.1109/TED.2014.2312820)

Gerrer, L., Ding, J., Amoroso, S.M., Adamu-Lema, F., Hussin, R., Reid, D., Millar, C. and Asenov, A. (2014) Modelling RTN and BTI in nanoscale MOSFETs from device to circuit: a review. Microelectronics Reliability, 54(4), pp. 682-697. (doi:10.1016/j.microrel.2014.01.024)

Sellier, J.M., Amoroso, S.M., Nedjalkov, M., Selberherr, S., Asenov, A. and Dimov, I. (2014) Electron dynamics in nanoscale transistors by means of Wigner and Boltzmann approaches. Physica A: Statistical Mechanics and its Applications, 398, pp. 194-198. (doi:10.1016/j.physa.2013.12.045)

Adamu-Lema, F., Amoroso, S.M., Wang, X., Cheng, B., Shifren, L., Aitken, R., Sinha, S., Yeric, G. and Asenov, A. (2014) The discrepancy between the uniform and variability aware atomistic TCAD simulations of decananometer bulk MOSFETs and FinFETs. In: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Yokohama, 9-11 Sept. 2014, pp. 285-288. ISBN 9781479952878 (doi:10.1109/SISPAD.2014.6931619)

Amoroso, S., Georgiev, V., Towie, E., Riddet, C. and Asenov, A. (2014) Metamorphosis of a nanowire: a 3-D coupled mode space NEGF study. In: 2014 International Workshop on Computational Electronics (IWCE), Paris, France, 3-6 June 2014, pp. 1-4. (doi:10.1109/IWCE.2014.6865854)

Asenov, A., Cheng, B., Adamu-Lema, F., Shifren, L., Sinha, S., Ridet, C., Alexander, C. L., Brown, A. R., Wang, X. and Amoroso, S. M. (2014) Predictive simulation of future CMOS technologies and their impact on circuits. In: 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology (ICSICT 2014), Guilin, China, 28-31 Oct. 2014, pp. 1411-1414.

Georgiev, V. P., Amoroso, S. M., Vila-Nadal, L. , Busche, C., Cronin, L. and Asenov, A. (2014) FDSOI Molecular Flash Cell with Reduced Variability for Low Power Flash Applications. In: 44th European Solid-State Device Research Conference (ESSDERC), Venice, Italy, 22-26 Sep 2014, pp. 353-356. ISBN 9781479943760 (doi:10.1109/ESSDERC.2014.6948833)

Lorenz, J., Bar, E., Burenkov, A., Evanschitzky, P., Asenov, A., Wang, L., Wang, X., Brown, A. R., Millar, C. and Reid, D. (2014) Simultaneous simulation of systematic and stochastic process variations. In: Proceedings of the 19th International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Yokohama Japan, 8-11 Sept. 2014. IEEE, pp. 289-292. ISBN 9781479952878 (doi:10.1109/SISPAD.2014.6931620)

Wang, L., Brown, A.R., Nedjalkov, M., Alexander, C., Cheng, B., Millar, C. and Asenov, A. (2014) 3D coupled electro-thermal FinFET simulations including the fin shape dependence of the thermal conductivity. In: 2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2014), Yokohama, Japan, 9-11 Sept. 2014, pp. 269-272. (doi:10.1109/SISPAD.2014.6931615)

Wang, L., Brown, A.R., Nedjalkov, M., Alexander, C., Cheng, B., Millar, C. and Asenov, A. (2014) 3D coupled electro-thermal simulations for SOI FinFET with statistical variations including the fin shape dependence of the thermal conductivity. In: 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology (ICSICT 2014), Guilin, China, 28-31 Oct 2014,

Wang, L., Brown, A., Cheng, B. and Asenov, A. (2014) Simulation of 3D FinFET doping profiles introduced by ion implantation and the impact on device performance. In: The 20th International Conference on Ion Implantation Technology (IIT 2014), Portland, OR, USA, 26 June - 4 July 2014, pp. 1-4. (doi:10.1109/IIT.2014.6940008)

Wang, L., Brown, A. R., Millar, C., Burenkov, A., Wang, X., Asenov, A. and Lorenz, J. (2014) Simulation for statistical variability in realistic 20nm MOSFET. In: 15th International Conference On Ultimate Integration On Silicon (ULIS2014), Stockholm, Sweden, 7-9 April 2014, pp. 5-8. (doi:10.1109/ULIS.2014.6813892)

Wang, X., Cheng, B., Brown, A.R., Millar, C. and Asenov, A. (2014) Accurate simulations of the interplay between process and statistical variability for nanoscale FinFET-based SRAM cell stability. In: 44th European Solid-State Device Research Conference (ESSDERC), Venice, Italy, 22-26 Sep 2014, pp. 349-352. ISBN 9781479943760

Wang, X., Cheng, B., Millar, C., Reid, D. and Asenov, A. (2014) Statistical aspects of FinFET based SRAM metrics subject to process and statistical variability. In: 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology (ICSICT 2014), Guilin, China, 28-31 Oct 2014, pp. 702-704.

2013

Vilà-Nadal, L. , Mitchell, S. G., Markov, S., Busche, C., Georgiev, V., Asenov, A. and Cronin, L. (2013) Towards polyoxometalate-cluster-based nano-electronics. Chemistry: A European Journal, 19(49), pp. 16502-16511. (doi:10.1002/chem.201301631)

Wang, X., Cheng, B., Brown, A. R., Millar, C., Kuang, J. B., Nassif, S. and Asenov, A. (2013) Statistical variability and reliability and the impact on corresponding 6T-SRAM cell design for a 14-nm node SOI FinFET technology. IEEE Design and Test, 30(6), pp. 18-28. (doi:10.1109/MDAT.2013.2266395)

Gerrer, L., Amoroso, S. M., Markov, S., Adamu-Lema, F. and Asenov, A. (2013) 3-D statistical simulation comparison of oxide reliability of planar MOSFETs and FinFET. IEEE Transactions on Electron Devices, 60(12), pp. 4008-4013. (doi:10.1109/TED.2013.2285588)

Mohd Zain, A. S., Markov, S., Cheng, B. and Asenov, A. (2013) Comprehensive study of the statistical variability in a 22nm fully depleted ultra-thin-body SOI MOSFET. Solid-State Electronics, 90, pp. 51-55. (doi:10.1016/j.sse.2013.02.052)

Wang, L., Brown, A. R., Cheng, B. and Asenov, A. (2013) Analytical models for three-dimensional ion implantation profiles in FinFETs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 32(12), pp. 2004-2008. (doi:10.1109/TCAD.2013.2277975)

Wang, X., Cheng, B., Brown, A., Millar, C., Kuang, J.B., Nassif, S. and Asenov, A. (2013) Impact of statistical variability and charge trapping on 14 nm SOI finFET SRAM cell stability. In: 43rd European Solid-State Device Research Conference (ESSDERC), Bucharest, Romania, 16-20 Sep 2013, pp. 234-237. (doi:10.1109/ESSDERC.2013.6818862)

Duan, M. , Zhang, J., Ji, Z., Zhang, W.D., Kaczer, B., Schram, T., Ritzenthaler, R., Groeseneken, G. and Asenov, A. (2013) New analysis method for time-dependent device-to-device variation accounting for within-device fluctuation. IEEE Transactions on Electron Devices, 60(8), pp. 2505-2511. (doi:10.1109/TED.2013.2270893)

Wang, X., Cheng, B., Brown, A.R., Millar, C., Kuang, J.B., Nassif, S. and Asenov, A. (2013) Interplay between process-induced and statistical variability in 14-nm CMOS technology double-gate SOI FinFETs. IEEE Transactions on Electron Devices, 60(8), pp. 2485-2492. (doi:10.1109/TED.2013.2267745)

Amoroso, S.M., Compagnoni, C.M., Ghetti, A., Gerrer, L., Spinelli, A.S., Lacaita, A.L. and Asenov, A. (2013) Investigation of the RTN Distribution of nanoscale MOS devices from subthreshold to on-state. IEEE Electron Device Letters, 34(5), pp. 683-685. (doi:10.1109/LED.2013.2250477)

Wang, X., Adamu-Lema, F., Cheng, B. and Asenov, A. (2013) Geometry, temperature, and body bias dependence of statistical variability in 20-nm bulk CMOS technology: a comprehensive simulation analysis. IEEE Transactions on Electron Devices, 60(5), pp. 1547-1554. (doi:10.1109/TED.2013.2254490)

Georgiev, V.P., Towie, E.A. and Asenov, A. (2013) Impact of precisely positioned dopants on the performance of an ultimate silicon nanowire transistor: a full three-dimensional NEGF simulation study. IEEE Transactions on Electron Devices, 60(3), pp. 965-971. (doi:10.1109/TED.2013.2238944)

Asenov, A., Cheng, B., Brown, A.R. and Wang, X. (2013) Impact of statistical variability on FinFET technology: from device, statistical compact modelling to statistical circuit simulation. In: van Roermund, A.H.M., Baschirotto, A. and Steyaert, M. (eds.) Nyquist AD Converters, Sensor Interfaces, and Robustness. Springer, pp. 281-291. ISBN 9781461445876 (doi:10.1007/978-1-4614-4587-6_15)

Asenov, A., Cheng, B., Wang, X., Brown, A.R., Reid, D., Millar, C. and Alexander, C. (2013) Simulation based transistor-SRAM co-design in the presence of statistical variability and reliability. In: IEEE International Electron Devices Meeting (IEDM), Washington, D.C., USA, 9-11 Dec 2013, pp. 818-821.

Cheng, B., Wang, X., Brown, A.R., Kuang, J.B., Reid, D., Millar, C., Nassif, S. and Asenov, A. (2013) SRAM device and cell co-design considerations in a 14nm SOI FinFET technology. In: 2013 IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, China, 19-23 May 2013, pp. 2339-2342. (doi:10.1109/ISCAS.2013.6572347)

Georgiev, V. P. , Markov, S., Vilà-Nadal, L. , Asenov, A. and Cronin, L. (2013) Molecular-Metal-Oxide-nanoelectronicS (M-MOS): Achieving the Molecular Limit. In: 16th International Workshop on Computational Electronics, Nara, Japan, 4-7 June 2013, ISBN 9783901578267

Georgiev, V. P., Markov, S., Vila-Nadal, L. , Busche, C., Cronin, L. and Asenov, A. (2013) Multi-scale computational framework for the evaluation of variability in the programing window of a flash cell with molecular storage. In: 2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC), Bucharest, Romania, 16-20 Sep 2013, pp. 230-233. (doi:10.1109/ESSDERC.2013.6818861)

Georgiev, V. P. , Towie, E. A. and Asenov, A. (2013) Interaction Between Precisely Placed Dopants and Interface Roughness in Silicon Nanowire Transistors: Full 3-D NEGF Simulation Study. In: 2013 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2013), Glasgow, Scotland, 3-5 Sep 2013, pp. 416-419. ISBN 9781467357333 (doi:10.1109/SISPAD.2013.6650663)

Wang, X., Brown, A.R., Cheng, B. and Asenov, A. (2013) Drain bias impact on statistical variability and reliability in 20 nm bulk CMOS technology. In: 14th International Conference on Ultimate Integration on Silicon (ULIS), Warwick, UK, 19-21 March 2013. IEEE, pp. 65-68. ISBN 978-1-4673-4800-3 (doi:10.1109/ULIS.2013.6523492)

Wang, X., Cheng, B., Brown, A.R., Millar, C., Alexander, C., Reid, D., Kuang, J.B., Nassif, S. and Asenov, A. (2013) Unified compact modelling strategies for process and statistical variability in 14-nm node DG FinFETs. In: 18th International Conference on Simulation of Semiconductor Processes and Devices: SISPAD 2013, Glasgow, UK, 3-5 Sep 2013, pp. 139-142.

2012

Bukhori, M.F., Kamsani, N.A., Asenov, A. and Nayan, N.A. (2012) Accurate capturing of the statistical aspect of NBTI/PBTI variability into statistical compact models. Microelectronics Journal, 43(11), pp. 793-801. (doi:10.1016/j.mejo.2012.07.004)

Simpson, R.N., Bordas, S.P.A., Asenov, A. and Brown, A. (2012) Enriched residual free bubbles for semiconductor device simulation. Computational Mechanics, 50(1), pp. 119-133. (doi:10.1007/s00466-011-0658-6)

Wang, X., Roy, G., Saxod, O., Bajolet, A., Juge, A. and Asenov, A. (2012) Simulation study of dominant statistical variability sources in 32-nm high-k/metal gate CMOS. IEEE Electron Device Letters, 33(5), pp. 643-645. (doi:10.1109/LED.2012.2188268)

Cheng, B., Wang, X., Brown, A.R., Millar, C. and Asenov, A. (2012) Statistical TCAD based PDK development for a FinFET technology at 14nm technology node. In: SISPAD 2012, Denver, CO, USA, 5-7 Sep 2012, pp. 113-116. ISBN 9780615717562

Cheng, B., Brown, A. R., Wang, X. and Asenov, A. (2012) Statistical variability study of a 10nm gate length SOI FinFET device. In: IEEE: Silicon Nanoelectronics Workshop (SNW), Honolulu, HI, USA, 10-11 Jun 2012, pp. 1-2. ISBN 9781467309967 (doi:10.1109/SNW.2012.6243343)

Markov, S., Cheng, B. and Asenov, A. (2012) Statistical variability in fully depleted SOI MOSFETs due to random dopant fluctuations in the source and drain extensions. IEEE Electron Device Letters, 33(3), pp. 315-317. (doi:10.1109/LED.2011.2179114)

Martinez, A., Aldegunde, M., Brown, A., Roy, S. and Asenov, A. (2012) NEGF simulations of a junctionless Si gate-all-around nanowire transistor with discrete dopants. Solid-State Electronics, 71, pp. 101-105. (doi:10.1016/j.sse.2011.10.028)

Moore, I., Millar, C., Roy, S. and Asenov, A. (2012) FET based nano-pore sensing: a 3D simulation study. Journal of Computational Electronics, 11(3), pp. 266-271. (doi:10.1007/s10825-012-0405-z)

Riddet, C., Watling, J., Chan, K., Parker, E.H.C., Whall, T.E., Leadley, D.R. and Asenov, A. (2012) Hole mobility in germanium as a function of substrate and channel orientation, strain, doping, and temperature. IEEE Transactions on Electron Devices, 59(7), pp. 1878-1884. (doi:10.1109/TED.2012.2194498)

Towie, E., Liao, S.-Y., Riddet, C. and Asenov, A. (2012) InGaAs implant-free quantum-well MOSFETs: performance evaluation using 3D Monte Carlo simulation. In: Intel European Research and Innovation Conference, Dublin, Ireland, 3-5 Oct 2012,

Wang, L., Brown, A. R., Cheng, B. and Asenov, A. (2012) Simulation of 3D FinFET doping profiles by ion implantation. In: 19th International Conference on Ion Implantation Technology, Valladolid, Spain, 25-29 June 2012, pp. 217-220. (doi:10.1063/1.4766527)

Wang, X., Brown, A., Cheng, B. and Asenov, A. (2012) RTS amplitude distribution in 20nm SOI finFETs subject to statistical variability. In: SISPAD: International Conference on Semiconductor Process and Device Simulations, Denver, CO, USA, 5-7 Sep 2012, pp. 296-299.

Wang, X., Brown, A., Cheng, B. and Asenov, A. (2012) Statistical distribution of RTS amplitudes in 20nm SOI FinFETs. In: Silicon Nanoelectronics Workshop (SNW 2012), Honolulu, HI, USA, 10-11 Jun 2012, (doi:10.1109/SNW.2012.6243347)

Wang, X., Cheng, B., Brown, A.R., Miller, C. and Asenov, A. (2012) Statistical variability in 14-nm node SOI FinFETs and its impact on corresponding 6T-SRAM cell design. In: ESSDERC2012: European Solid-State Device Research Conference 2012, Bordeaux, France, 17-21 Sep 2012, pp. 113-116. (doi:10.1109/ESSDERC.2012.6343346)

Watling, J.R., Riddet, C. and Asenov, A. (2012) Accurate and efficient modelling of inelastic hole-acoustic phonon scattering in Monte Carlo simulations. In: 15th International Workshop on Computational Electronics (IWCE), Madison, WI, USA, 22-25 May 2012, pp. 1-4. (doi:10.1109/IWCE.2012.6242866)

2011

Roy, G., Ghetti, A., Benvenuti, A., Erlebach, A. and Asenov, A. (2011) Comparative simulation study of the different sources of statistical variability in contemporary floating-gate nonvolatile memory. IEEE Transactions on Electron Devices, 58(12), pp. 4155-4163. (doi:10.1109/TED.2011.2167511)

Aldegunde, M., Martinez, A. and Asenov, A. (2011) Non-equilibrium Green’s function analysis of cross section and channel length dependence of phonon scattering and its impact on the performance of Si nanowire field effect transistors. Journal of Applied Physics, 110(9), 094518. (doi:10.1063/1.3658856)

Towie, E., Chan, K.-H., Benbakhti, B., Riddet, C. and Asenov, A. (2011) Statistical variability in implant-free quantum-well MOSFETs with InGaAs and Ge: a comparative 3D simulation study. In: Intel European Research and Innovation Conference, Dublin, Ireland, 12-14 Mar 2011,

Amoroso, S.M., Alexander, C.L., Markov, S., Roy, G. and Asenov, A. (2011) A mobility model correction for 'atomistic' drift-diffusion simulation. In: 2011 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Osaka, Japan, 8-10 Sep 2011, pp. 279-282. ISBN 9781612844190 (doi:10.1109/SISPAD.2011.6035023)

Asenov, P., Adamu-Lema, F., Roy, S., Millar, C., Asenov, A., Roy, G., Kovac, U. and Reid, D. (2011) The effect of compact modelling strategy on SNM and Read Current variability in Modern SRAM. In: 2011 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Osaka, Japan, 8-10 Sep 2011, pp. 283-286. ISBN 9781612844190 (doi:10.1109/SISPAD.2011.6035024)

Benbakhti, B. et al. (2011) Numerical analysis of the new implant-free quantum-well CMOS: DualLogic approach. Solid-State Electronics, 63(1), pp. 14-18. (doi:10.1016/j.sse.2011.05.006)

Markov, S., Wang, X., Moezi, N. and Asenov, A. (2011) Drain current collapse in nanoscaled bulk MOSFETs due to random dopant compensation in the source/drain extensions. IEEE Transactions on Electron Devices, 58(8), pp. 2385-2393. (doi:10.1109/TED.2011.2152845)

Martinez, A., Aldegunde, M., Seoane, N., Brown, A.R., Barker, J.R. and Asenov, A. (2011) Quantum-transport study on the impact of channel length and cross sections on variability induced by random discrete dopants in narrow gate-all-around silicon nanowire transistors. IEEE Transactions on Electron Devices, 58(8), pp. 2209-2217. (doi:10.1109/TED.2011.2157929)

Wang, X., Brown, A.R., Idris, N., Markov, S., Roy, G. and Asenov, A. (2011) Statistical threshold-voltage variability in scaled decananometer bulk HKMG MOSFETs: a full-scale 3-D simulation scaling study. IEEE Transactions on Electron Devices, 58(8), pp. 2293-2301. (doi:10.1109/TED.2011.2149531)

Reid, D., Millar, C., Roy, S. and Asenov, A. (2011) Statistical enhancement of the evaluation of combined RDD- and LER-induced VT variability: lessons from 10⁵ sample simulations. IEEE Transactions on Electron Devices, 58(8), 2257 -2265. (doi:10.1109/TED.2011.2147317)

Cheng, B., Brown, A.R. and Asenov, A. (2011) Impact of NBTI/PBTI on SRAM stability degradation. IEEE Electron Device Letters, 32(6), pp. 740-742. (doi:10.1109/LED.2011.2136316)

Garcia-Loureiro, A.J., Seoane, N., Aldegunde, M., Valin, R., Asenov, A., Martinez, A. and Kalna, K. (2011) Implementation of the density gradient quantum corrections for 3-D simulations of multigate nanoscaled transistors. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 30(6), pp. 841-851. (doi:10.1109/TCAD.2011.2107990)

Chan, K.H., Benbakhti, B., Riddet, C., Watling, J. and Asenov, A. (2011) Simulation study of the 20nm gate-length implant-free quantum well p-MOSFET. Microelectronic Engineering, 88(4), pp. 362-365. (doi:10.1016/j.mee.2010.09.025)

Wang, X., Roy, S., Brown, A.R. and Asenov, A. (2011) Impact of STI on statistical variability and reliability of decananometer MOSFETs. IEEE Electron Device Letters, 32(4), pp. 479-481. (doi:10.1109/LED.2011.2108256)

Benbakhti, B., Kalna, K., Chan, K.H., Towie, E., Hellings, G., Eneman, G., De Meyer, K., Meuris, M. and Asenov, A. (2011) Design and analysis of the In0.53Ga0.47As implant-free quantum-well device structure. Microelectronic Engineering, 88(4), pp. 358-361. (doi:10.1016/j.mee.2010.11.019)

Watling, J.R., Riddet, C., Chan, K.H. and Asenov, A. (2011) Simulation of hole-mobility in doped relaxed and strained Ge. Microelectronic Engineering, 88(4), pp. 462-464. (doi:10.1016/j.mee.2010.11.017)

Riddet, C., Alexander, C., Brown, A., Roy, S. and Asenov, A. (2011) Simulation of "ab initio" quantum confinement scattering in UTB MOSFETs using three-dimensional ensemble Monte Carlo. IEEE Transactions on Electron Devices, 58(3), pp. 600-608. (doi:10.1109/TED.2010.2095422)

Aymerich, N. et al. (2011) New reliability mechanisms in memory design for sub-22nm technologies. In: IEEE 17th International On-Line Testing Symposium (IOLTS), Athens, Greece, 13-15 Jul 2011, pp. 111-114. ISBN 9781457710537 (doi:10.1109/IOLTS.2011.5993820)

Markov, S., Idris, N.M. and Asenov, A. (2011) Statistical variability in n-channel UTB-FD-SOI MOSFETs under the influence of RDF, LER, MGG and PBTI. In: 2011 IEEE International SOI Conference, Tempe, AZ, 3-6 Oct 2011, pp. 1-2. (doi:10.1109/SOI.2011.6081680)

Wang, X., Brown, A.R., Cheng, B. and Asenov, A. (2011) Statistical variability and reliability in nanoscale FinFETs. In: IEEE International Electron Devices Meeting (IEDM), Washington DC, USA, 5-7 Dec 2011, 5.4.1-5.4.4. (doi:10.1109/IEDM.2011.6131494)

2010

Markov, S., Roy, S. and Asenov, A. (2010) Direct tunnelling gate leakage variability in nano-CMOS transistors. IEEE Transactions on Electron Devices, 57(11), pp. 3106-3114. (doi:10.1109/TED.2010.2075932)

Reid, D., Millar, C., Roy, S. and Asenov, A. (2010) Understanding LER-induced MOSFET VT variability - part I: three-dimensional simulation of large statistical samples. IEEE Transactions on Electron Devices, 57(11), pp. 2801-2807. (doi:10.1109/TED.2010.2067731)

Reid, D., Millar, C., Roy, S. and Asenov, A. (2010) Understanding LER-induced MOSFET VT variability - part II: reconstructing the distribution. IEEE Transactions on Electron Devices, 57(11), pp. 2808-2813. (doi:10.1109/TED.2010.2067732)

Kovac, U., Alexander, C., Roy, G., Riddet, C., Cheng, B.J. and Asenov, A. (2010) Hierarchical Simulation of Statistical Variability: From 3-D MC With "ab initio" Ionized Impurity Scattering to Statistical Compact Models. IEEE Transactions on Electron Devices, 57(10), pp. 2418-2426. (doi:10.1109/TED.2010.2062517)

Brown, A.R., Huard, V. and Asenov, A. (2010) Statistical Simulation of Progressive NBTI Degradation in a 45-nm Technology pMOSFET. IEEE Transactions on Electron Devices, 57(9), pp. 2320-2323. (doi:10.1109/TED.2010.2052694)

Brown, A., Idris, N., Watling, J. and Asenov, A. (2010) Impact of metal gate granularity on threshold voltage variability: a full-scale 3D statistical simulation study. IEEE Electron Device Letters, 31(11), pp. 1199-1201. (doi:10.1109/LED.2010.2069080)

Martinez, A., Seoane, N., Brown, A.R., Barker, J.R. and Asenov, A. (2010) Variability in Si nanowire MOSFETs due to the combined effect of interface roughness and random dopants: a fully three-dimensional NEGF simulation study. IEEE Transactions on Electron Devices, 57(7), pp. 1626-1635. (doi:10.1109/TED.2010.2048405)

Cheng, B., Brown, A.R., Roy, S. and Asenov, A., (2010) PBTI/NBTI-related variability in TB-SOI and DG MOSFETs. IEEE Electron Device Letters, 31(5), pp. 408-410. (doi:10.1109/LED.2010.2043812)

Bukhori, M.F., Roy, S. and Asenov, A. (2010) Simulation of statistical aspects of charge trapping and related degradation in bulk MOSFETs in the presence of random discrete dopants. IEEE Transactions on Electron Devices, 57(4), pp. 795-803. (doi:10.1109/TED.2010.2041859)

Benbakhti, B., Ayubi-Moak, J.S., Kalna, K., Lin, D., Hellings, G., Brammertz, G., De Meyer, K., Thayne, I.G. and Asenov, A. (2010) Impact of interface state trap density on the performance characteristics of different III-V MOSFET architectures. Microelectronics Reliability, 50(3), pp. 360-364. (doi:10.1016/j.microrel.2009.11.017)

Bindu, B., Cheng, B., Roy, G., Wang, X., Roy, S. and Asenov, A. (2010) Parameter set and data sampling strategy for accurate yet efficient statistical MOSFET compact model extraction. Solid-State Electronics, 54(3), pp. 307-315. (doi:10.1016/j.sse.2009.09.028)

Aldegunde, M., Martinez, A. and Asenov, A. (2010) Impact of scattering on the performance of a Si GAA Nanowire FET: from diffusive to ballistic regime. In: 14th International Workshop on Computational Electronics (IWCE), Pisa, Italy, 27-29 Oct 2010,

Asenov, A. (2010) Advanced Monte Carlo Techniques in the Simulation of CMOS Devices and Circuits. In: Numerical Methods and Applications 7th International Conference, Borovets, Bulgaria, 20-24 Aug 2010,

Asenov, A. (2010) Statistical nano CMOS variability and its impact on SRAM. In: Singhee, A. and Rutenbar, R.A. (eds.) Extreme Statistics in Nanoscale Memory Design. Springer, pp. 17-50. ISBN 9781441966056 (doi:10.1007/978-1-4419-6606-3_3)

Asenov, A. and Cheng, B. (2010) Modeling and Simulation of Statistical Variability in Nanometer CMOS Technologies. In: 19th Workshop on Advances in Analog Circuit Design, Graz University of Technology,

Asenov, A., Cheng, B., Dideban, D., Kovac, U., Moezi, N., Millar, C., Roy, G., Brown, A. and Roy, S. (2010) Modeling and simulation of transistor and circuit variability and Reliability. In: Custom Integrated Circuit Conference (CICC), San Jose, CA, USA, 19-22 September 2010, pp. 1-8. (doi:10.1109/CICC.2010.5617627)

Asenov, P., Kamsani, N.A., Reid, D., Millar, C., Roy, S. and Asenov, A. (2010) Combining Process and Statistical Variability in the Evaluation of the Effectiveness of Corners in Digital Circuit Parametric Yield Analysis. In: ESSDERC 2010, Sevilla, 13-17 September,

Asenov, P., Reid, D., Millar, C., Roy, S., Liu, Z., Furber, S. and Asenov, A. (2010) Generic Aspects of Digital Circuit Behaviour In the Presence of Statistical Variability. In: VARI 2010,

Benbakhti, B. et al. (2010) Performance analysis of the new implant-free quantum-well CMOS : DualLogic approach. Solid State Electronics Journal, (Unpublished)

Benbakhti, B., Kalna, K., Chan, K.H., Hellings, G., Eneman, G., De Meyer, K., Meuris, M. and Asenov, A. (2010) Design and Analysis of a New In53Ga47As Implant-Free Quantum-Well Device Structure. In: European Materials Research Society (EMRS), Spring Meeting, Strasbourg,

Benbakhti, B., Kalna, K., Wang, X., Cheng, B., Hellings, G., Eneman, G., De Meyer, K., Meuris, M. and Asenov, A. (2010) Impact of Raised Source/Drain in the In53Ga47As Channel Implant-Free Quantum-Well Transistor. In: 11th International Conference on Ultimate Integration Silicon (ULIS), Glasgow, UK, 2010, p. 129.

Benbakhti, B., Towie, E., Kalna, K., Hellings, G., Eneman, G., De Meyer, K., Meuris, M. and Asenov, A. (2010) Monte Carlo Analysis of In0.53Ga0.47As implant-free Qqantum-well device performance. In: 2010 Silicon Nanoelectronics Workshop, Hilton Hawaiian Village, Honolulu, Hawaii, 13-14 June 2010,

Chan, K.H., Riddet, C., Benbakhti, B., Watling, J. and Asenov, A. (2010) Simulation and Optimization of Implant-Free Quantum Well Germanium p-MOSFET Design. In: European Materials Research Society (EMRS), Spring Meeting, Strasbourg,

Cheng, B., Dideban, D., Moezi, N., Millar, C., Roy, G., Wang, X., Roy, S. and Asenov, A. (2010) Capturing intrinsic parameter fluctuations using the PSP compact model. In: Proceedings of the Conference on Design, Automation and Test in Europe (DATE 2010), Dresden, Germany, 8-12 March 2010, pp. 650-653.

Cheng, B., Moezi, N., Dideban, D., Millar, C., Roy, S. and Asenov, A. (2010) Impact of Statistical Parameter set Selection on Accuracy of Statistical Compact Modelling. In: MOS-AK Workshop, Sapienza University, Rome, Italy, 8-9 April 2010,

Cheng, B.J., Dideban, D., Moezi, N., Millar, C., Roy, G., Wang, X., Roy, S. and Asenov, A. (2010) Statistical-variability compact-modeling strategies for BSIM4 and PSP. IEEE Design and Test of Computers, 27(2), pp. 26-35. (doi:10.1109/MDT.2010.53)

Dideban, D., Cheng, B., Moezi, N., Kamsani, N.A., Millar, C., Roy, S. and Asenov, A. (2010) Impact of input slew rate on statistical timing and power dissipation variability in nanoCMOS. In: 11th International Conference on Ultimate Integration on Silicon, Glasgow, Scotland, 17-19 Mar 2010,

Dideban, D., Cheng, B., Moezi, N., Wang, X. and Asenov, A. (2010) Evaluation of 35nm MOSFET capacitance components in PSP compact model. In: 18th Iranian Conference on Electrical Engineering (ICEE), 2010, Isfahan, Iran, 11-13 May 2010, (doi:10.1109/IRANIANCEE.2010.5507045)

Garcia-Loureiro, A., Aldegunde, M., Seoane, N., Kalna, K. and Asenov, A. (2010) Impact of Random Dopant Fluctuations on a Tri-Gate MOSFET. In: 11th International Conference on Ultimate Integration on Silicon, 18-19 March 2010, p. 77.

Idris, N.M., Brown, A., Watling, J. and Asenov, A. (2010) Simulation Study of Workfunction Variability in MOSFETs with Polycrystalline Metal Gates. In: 11th International Conference on Ultimate Integration Silicon (ULIS), Glasgow, UK,

Kamsani, N.A., Cheng, B., Millar, C., Moezi, N., Wang, X., Roy, S. and Asenov, A. (2010) Impact of slew rate definition on the accuracy of nanoCMOS inverter timing simulations. In: 11th International Conference on Ultimate Integration on Silicon, Glasgow, Scotland, 17-19 Mar 2010, p. 53.

Kovac, U., Alexander, C. and Asenov, A. (2010) Statistical Estimation of Electrostatic and Transport Contributions to device Parameter Variation. In: 14th International Workshop on Computational Electronics, 27-29 October 2010,

Kovac, U., Alexander, C., Roy, G., Cheng, B. and Asenov, A. (2010) Compact Model Extraction from Quantum Corrected Statistical Monte Carlo Simulation of Random Dopant Induced Drain Current Variability. In: 8th International Conference on Advanced Semiconductor Devices and Microsystems, 25-27 Oct 2010, pp. 317-320. (In Press)

Kovac, U., Dideban, D., Cheng, B., Moezi, N., Roy, G. and Asenov, A. (2010) A novel approach to the statistical generation of non-normal distributed PSP compact model parameters using a nonlinear power method. In: 15th International Conference on Simulation of Semiconductor Preocesses and Devices (SISPAD), Bologna, Italy, 6-8 Sep 2010,

Markov, S., Shushko, P., Fiegna, C., Sangiorgi, E., Shluger, A. and Asenov, A. (2010) From ab initio properties of the Si-Si02 interface, to electrical characteristics of metal-oxide-semiconductor devices. Journal of Physics: Conference Series, 242(1), (doi:10.1088/1742-6596/242/1/012010)

Martinez, A.,, Seoane, N., Brown, A. and Asenov, A. (2010) A detailed 3D-NEGF simulation study of tunneling in a n-Si nanowire MOSFETs. In: 2010 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, 13-14 June 2010,

Martinez, A., Aldegunde, M. and Asenov, A. (2010) Channel length dependence of discrete dopant effects in narrow si nanowire transistors: A full 3D NEGF study. In: 14th International Workshop on Computational Electronics (IWCE), Pisa, Italy, 27-29 Oct 2010,

Martinez, A., Barker, J., Seoane, N., Brown, A. and Asenov, A. (2010) Dopants and roughness induced resonances in thin Si nanowire transistors: A self-consistent NEGF-poisson study. Journal of Physics: Conference Series, 220(1), 012009. (doi:10.1088/1742-6596/220/1/012009)

Martinez, A., Benbakhti, B. and Asenov, A. (2010) Effect of the channel thickness on the performance of the implant-free quantum-well MOSFET. In: 14th International Workshop on Computational Electronics, Pisa, Italy, 27-29 Oct 2010,

Martinez, A., Brown, A. and Asenov, A. (2010) Full-band NEGF simulations of surface roughness in Si nanowires. Journal of Physics: Conference Series, 242(1), 012016. (doi:10.1088/1742-6596/242/1/012016)

Moore, I., Millar, C., Roy, S. and Asenov, A. (2010) Brownian noise in FET based nano-pore sensing a 3D simulation study. In: 14th International Workshop on Computational Electronics, Pisa, Italy, 27-29 Oct 2010,

Moore, I., Millar, C., Roy, S. and Asenov, A. (2010) Integrating drift diffusion and Brownian simulations for sensory applications. In: 11th International Conference on Ultimate Integration on Silicon, Glasgow, UK, 17-19 Mar 2010, pp. 85-88.

Riddet, C., Watling, J., Chan, K. and Asenov, A. (2010) Monte Carlo simulation study of the impact of strain and substrate orientation on hole mobility in Germanium. Journal of Physics: Conference Series, 242(1), 012017. (doi:10.1088/1742-6596/242/1/012017)

Riddet, C., Watling, J., Chan, K. and Asenov, A. (2010) Monte carlo simulation study of the impact of strain and substrate orientation on hole mobility on Geranium. In: 14th International Workshop on Computational Electronics (IWCE), Pisa, Italy, 27-29 Oct 2010, pp. 239-242.

Riddet, C., Watling, J., Chan, K.H., Asenov, A., De Jaeger, B., Mitard, J. and Meuris, M. (2010) Monte Carlo Simulation Study of Hole Mobility in Germanium MOS Inversion Layers. In: 14 International Workshop on Computational Electronics, Pisa, Italy, 26-29 October 2010, pp. 239-242. (doi:10.1109/IWCE.2010.5677972)

Sinnott, R.O., Stewart, G., Asenov, A., Millar, C., Reid, D., Roy, G., Roy, S., Davenhall, C., Harbulot, B. and Jones, M. (2010) E-infrastructure support for nanoCMOS device and circuit simulations. In: Hamza, M.H. (ed.) Proceedings of the Conference on Parallel and Distributed Computing and Networks, Innsbruck, Austria, 16-18th February 2010. ACTA Press: Anaheim, USA. ISBN 9780889868342

Tang, T.B., Murray, A.F., Cheng, B. and Asenov, A. (2010) Statistical NBTI-effect prediction for ULSI circuits. In: IEEE International Symposium on Circuits and Systems, Paris, France, 30 May - 2 Jun 2010, pp. 2494-2497. (doi:10.1109/ISCAS.2010.5537132)

Watling, J., Riddet, C., Chan, K. and Asenov, A. (2010) Simulation of hole-mobility in doped relaxed and strained Ge layers. In: European Materials Research Society (EMRS), Spring Meeting, Strasbourg, 2010,

Watling, J., Riddet, C., Chan, K. and Asenov, A. (2010) Simulation of hole-mobility in doped relaxed and strained Ge layers. Journal of Applied Physics, 108(9), 093715.

2009

Davenhall, C., Harbulot, B., Jones, M., Stewart, G., Sinnott, R.O., Asenov, A., Millar, C., Roy, G. and Reid, D. (2009) Data management of nanometre­ scale CMOS device simulations. In: 5th International Digital Curation Conference, London, UK, 2-4 Dec 2009,

Palestri, P. et al. (2009) A comparison of advanced transport models for the computation of the drain current in nanoscale nMOSFETs. Solid-State Electronics, 53(12), pp. 1293-1302. (doi:10.1016/j.sse.2009.09.019)

Reid, D., Millar, C., Roy, G., Roy, S. and Asenov, A. (2009) Analysis of threshold voltage distribution due to random dopants: a 100 000-sample 3-D simulation study. IEEE Transactions on Electron Devices, 56(10), pp. 2255-2263. (doi:10.1109/TED.2009.2027973)

Ayubi-Moak, J.S., Benbakhti, B., Kalna, K., Paterson, G.W., Hill, R., Passlack, M., Thayne, I.G. and Asenov, A. (2009) Effect of interface state trap density on the characteristics of n-type, enhancement-mode, implant-free In0.3Ga0.7As MOSFETs. Microelectronic Engineering, 86(7-9), pp. 1564-1567. (doi:10.1016/j.mee.2009.03.024)

Sinnott, R.O., Stewart, G., Asenov, A., Millar, C., Reid, D., Roy, G., Roy, S., Davenhall, C., Harbulot, B. and Jones, M. (2009) Multi-level simulations to support nanoCMOS electronics research. In: 2009 ASME Design Engineering Technical Conferences and Computers and Information in Engineering Conference DETC2009, August 30-September 2, 2009, San Diego, California, USA. American Society of Mechanical Engineers: New York, USA. ISBN 9780791838563

Cheng, B., Roy, S., Brown, A.R., Millar, C. and Asenov, A. (2009) Evaluation of statistical variability in 32 and 22 nm technology generation LSTP MOSFETs. Solid-State Electronics, 53(7), pp. 767-772. (doi:10.1016/j.sse.2009.03.008)

Reid, D., Millar, C., Roy, S., Roy, G., Sinnott, R.O., Stewart, G., Stewart, G. and Asenov, A. (2009) Enabling cutting-edge semiconductor simulation through grid technology. Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences, 367(1897), pp. 2573-2584. (doi:10.1098/rsta.2009.0031)

Hill, R.J.W. et al. (2009) Deep sub-micron and self-aligned flatband III–V MOSFETs. In: Device Research Conference, 2009 (DRC 2009), University Park, PA, USA, 22-24 Jun 2009, pp. 251-252. (doi:10.1109/DRC.2009.5354900)

Seoane, N., Garcia-Loureiro, A., Aldegunde, M., Kalna, K. and Asenov, A. (2009) Impact of intrinsic parameter fluctuations on the performance of In0.75Ga0.25As implant free MOSFETs. Semiconductor Science and Technology, 24(5), (doi:10.1088/0268-1242/24/5/055011)

Alexander, C., Kovac, U., Roy, G., Roy, S. and Asenov, A. (2009) A unified density gradient approach to 'ab-initio' ionized impurity scattering in 3D MC simulations of nano-CMOS variability. In: Ultimate Integration of Silicon: ULIS 2009, Aachen, Germany, 18-20 Mar 2009, pp. 43-46. (doi:10.1109/ULIS.2009.4897535)

Asenov, A., Brown, A., Roy, G., Cheng, B., Alexander, C., Riddet, C., Kovac, U., Martinez, A., Seoane, N. and Roy, S. (2009) Simulation of statistical variability in nano-CMOS transistors using drift-diffusion, Monte Carlo and non-equilibrium Green's function techniques. Journal of Computational Electronics, 8(3-4), pp. 349-373. (doi:10.1007/s10825-009-0292-0)

Ayubi-Moak, J.S., Kalna, K. and Asenov, A. (2009) High-performance in0.75Ga0.25As implant-free n-type MOSFETs for low power applications. In: Electron Devices, 2009. CDE 2009. Spanish Conference on. IEEE, pp. 92-95. ISBN 9781424428380 (doi:10.1109/SCED.2009.4800438)

Benbakhti, B., Ayubi-Moak, J.S., Kalna, K. and Asenov, A. (2009) Effect of Interface State Trap Density on the Performance of Scaled Surface Channel In0.3Ga0.7As MOSFETs. Journal of Physics: Conference Series, 193, (doi:10.1088/1742-6596/193/1/012122)

Brown, A.R., Martinez, A., Seoane, N. and Asenov, A. (2009) Comparison of Density Gradient and NEGF for 3D Simulation of a Nanowire MOSFET. Proceedings of the 2009 Spanish Conference on Electron Devices, pp. 140-143.

Bukhori, M.F., Roy, S. and Asenov, A. (2009) Simulation of statistical aspects of reliability in nano CMOS. In: IEEE International Integrated Reliability Workshop (IRW '09), S. Lake Tahoe, CA., U.S.A., 18-22 Oct 2009, pp. 82-85. ISBN 9781424439218 (doi:10.1109/IRWS.2009.5383028)

Cheng, B., Moezi, N., Dideban, D., Roy, G., Roy, S. and Asenov, A. (2009) Benchmarking the Accuracy of PCA Generated Statistical Compact Model Parameters Against Physical Device Simulation and Directly Extracted Statistical Parameters. In: Simulation of Semiconductor Processes and Devices, 2009, San Diego, CA, 9-11th September, 2009, pp. 1-4. ISBN 1946-1569 (doi:10.1109/SISPAD.2009.5290230)

Kamsani, N.A., Cheng, B.J., Roy, S. and Asenov, A. (2009) Impact of Random Dopant Induced Statistical Variability on Inverter Switching Trajectories and Timing Variability. In: ISCAS: IEEE International Symposium on Circuits and Systems, 2009, pp. 577-580.

Martinez, A., Brown, A., Seoane, N. and Asenov, A. (2009) Investigation of resistance in n-doped Si wires using NEGF formalism. In: Spanish Conference on Electron Devices (CDE 2009), Santiago de Compostela, Spain, 11-13 Feb 2009, pp. 416-419. ISBN 9781424428380 (doi:10.1109/SCED.2009.4800522)

Martinez, A., Brown, A.R., Asenov, A. and Seoane, N. (2009) A comparison between a fully-3D real-space versus coupled mode-space NEGF in the study of variability in gate-all-around Si nanowire MOSFET. In: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2009), San Diego, California, 9-11 September 2009, pp. 194-197.

Martinez, A., Brown, A.R., Seoane, N. and Asenov, A. (2009) Perturbative vs non-perturbative impurity scattering in a narrow Si nanowire GAA transistor: A NEGF study. Journal of Physics: Conference Series, 193(1), (doi:10.1088/1742-6596/193/1/012047)

Martinez, A., Kalna, K. and Asenov, A. (2009) Impurity potential induced resonances in Doped Si nanowire: A NEGF approach. In: 9th IEEE Conference on Nanotechnology, 2009. IEEE-NANO 2009, Genoa, Italy, 26-30 Jul 2009, pp. 551-554. ISBN 9781424448326

Martinez, A., Kalna, K., Sushko, P.V., Shluger, A.L., Barker, J.R. and Asenov, A. (2009) Impact of Body-Thickness-Dependent Band Structure on Scaling of Double-Gate MOSFETs: A DFT/NEGF Study. IEEE Transactions on Nanotechnology, 8(2), pp. 159-166. (doi:10.1109/TNANO.2008.917776)

Martinez, A., Seoane, N., Brown, A.R., Barker, J.R. and Asenov, A. (2009) 3-D Nonequilibrium Green's Function Simulation of Nonperturbative Scattering From Discrete Dopants in the Source and Drain of a Silicon Nanowire Transistor. IEEE Transactions on Nanotechnology, 8(5), pp. 603-610. (doi:10.1109/TNANO.2009.2020980)

Reid, D., Millar, C., Roy, G., Roy, S. and Asenov, A. (2009) Efficient simulation of 6σ VT distribution due to random descrete dopants. In: 10th International Conference on Ultimate Integration of Silicon, 2009. ULIS 2009., Aachen, Germany, 18-20 Mar 2009, pp. 23-26. (doi:10.1109/ULIS.2009.4897530)

Reid, D., Millar, C., Roy, G., Roy, S. and Asenov, A. (2009) Statistical enhancement of combined simulations of RDD and LER variability: what can simulation of a 105 sample teach us? In: Proceedings of the 2009 IEEE International Electron Devices Meeting (IEDM), Baltimore, USA, 7-9 December 2009. IEEE Computer Society, pp. 657-660. ISBN 9781424456390 (doi:10.1109/IEDM.2009.5424241)

Reid, D., Millar, C., Roy, G., Roy, S. and Asenov, A. (2009) Understanding LER-induced statistical variability: a 35,000 sample 3D simulation study. In: European Solid State Device Research Conference, 2009. ESSDERC '09, Athens, Greece, 14-18 Sep 2009, pp. 423-426. (doi:10.1109/ESSDERC.2009.5331515)

Seoane, N., Martinez, A., Brown, A. and Asenov, A. (2009) Study of surface roughness in extremely small Si nanowire MOSFETs using fully-3D NEGFs. In: Spanish Conference on Electron Devices, 2009. CDE 2009., Santiago de Compostela, Spain, 11-13 Feb 2009, pp. 180-183. ISBN 9781424428380 (doi:10.1109/SCED.2009.4800460)

Seoane, N., Martinez, A., Brown, A.R., Barker, J.R. and Asenov, A. (2009) Current variability in Si nanowire MOSFETs due to random dopants in the source/drain regions: a fully 3-D NEGF simulation study. IEEE Transactions on Electron Devices, 56(7), pp. 1388-1395. (doi:10.1109/TED.2009.2021357)

Thayne, I.G. et al. (2009) Review of current status of III-V MOSFETs. ECS Transactions, 19(5), pp. 275-286. (doi:10.1149/1.3119552)

Twaddle, F., Cumming, D., Roy, S., Asenov, A. and Drysdale, T. (2009) Variability of short-range interconnects. In: 13th International Workshop on Computational Electronics, Beijing, China, 27-29 May 2009,

Twaddle, F.J., Cumming, D.R.S., Roy, S., Asenov, A. and Drysdale, T.D. (2009) RC variability of short-range interconnects. In: IWCE 2009: 13th International Workshop on Computational Electronics, Beijing, China, 27-29 May 2009, pp. 121-124. (doi:10.1109/IWCE.2009.5091143)

Wang, X.S., Roy, S. and Asenov, A. (2009) Impact of strain on the performance of high-k/metal replacement gate MOSFETs. In: 10th International Conference on Ultimate Integration of Silicon, Aachen, Germany, 18-20 March 2009, pp. 289-292. (doi:10.1109/ULIS.2009.4897592)

2008

Alexander, C., Roy, G. and Asenov, A. (2008) Random-dopant-induced drain current variation in Nano-MOSFETs: a three-dimensional self-consistent Monte Carlo simulation study using "ab initio" ionized impurity scattering. IEEE Transactions on Electron Devices, 55(11), pp. 3251-3258. (doi:10.1109/TED.2008.2004647)

Hill, R., Moran, D., Li, X., Macintyre, D.S., Thoms, S., Asenov, A., Droopad, R., Passlack, M. and Thayne, I. (2008) III-V MOSFETs: a possible solution for sub-22 nm CMOS nFETs. In: 17th European Heterostructure Technology Workshop, Venice, Italy, Nov 2008,

Thayne, I. G., Hill, R. J. W., Moran, D.A.J., Kalna, K., Asenov, A. and Passlack, M. (2008) Comments on "High Performance Inversion-Type Enhancement-Mode InGaAs MOSFET With Maximum Drain Current Exceeding 1 A/mm". IEEE Electron Device Letters, 29(10), pp. 1085-1086. (doi:10.1109/LED.2008.2002752)

Sinnott, R.O. et al. (2008) Scalable, security-oriented solutions for nanoCMOS electronics. In: UK e-Science All Hands Meeting, Edinburgh, UK, 8-11 Sept 2008,

Kalna, K., Seoane, N., Garcia-Loureiro, A. J., Thayne, I. G. and Asenov, A. (2008) Benchmarking of scaled InGaAs implant-free NanoMOSFETs. IEEE Transactions on Electron Devices, 55(9), pp. 2297-2306. (doi:10.1109/TED.2008.927658)

Riddet, C., Brown, A. R., Roy, S. and Asenov, A. (2008) Boundary conditions for Density Gradient corrections in 3D Monte Carlo simulations. Journal of Computational Electronics, 7(3), pp. 231-235. (doi:10.1007/s10825-008-0222-6)

Harbulot, B., Berry, D., Davenhall, C., Jones, M., Millar, C., Roy, G., Sinnott, R.O., Stewart, G. and Asenov, A. (2008) A resource-oriented data management architecture for nanoCMOS electronics. In: UK e-Science All Hands Meeting, Edinburgh, UK, 8-11 Sept 2008,

Asenov, A., Cathignol, A., Cheng, B., McKenna, K. P., Brown, A. R., Shluger, A. L., Chanemougame, D., Rochereau, K. and Ghibaudo, G. (2008) Origin of the asymmetry in the magnitude of the statistical variability of n- and p-channel poly-Si gate bulk MOSFETs. IEEE Electron Device Letters, 29(8), pp. 913-915. (doi:10.1109/LED.2008.2000843)

Sinnott, R.O., Millar, C. and Asenov, A. (2008) Supercomputing at work in the nanoCMOS electronics domain. ERCIM News, 74, pp. 22-23.

Watling, J. R., Brown, A. R., Ferrari, G., Barker, J. R., Bersuker, G., Zeitzoff, P. and Asenov, A. (2008) Impact of high-kappa gate stacks on transport and variability in nano-CMOS devices. Journal of Computational and Theoretical Nanoscience, 5(6), pp. 1072-1088.

Hill, R.J.W. et al. (2008) 1 μm gate length, In0.75Ga0.25As channel, thin body n-MOSFET on InP substrate with transconductance of 737μS/μm. Electronics Letters, 44, pp. 498-500. (doi:10.1049/el:20080470)

Aldegunde, M., Seoane, N., Garcia-Loureiro, A. J., Sushko, P. V., Shluger, A. L., Gavartin, J. L., Kalna, K., and Asenov, A., (2008) Atomistic mesh generation for the simulation of nanoscale metal-oxide-semiconductor field-effect transistors. Physical Review E, 77(5), (doi:10.1103/PhysRevE.77.056702)

Asenov, A. (2008) Impact of the field induced polarization space-charge on the characteristics of AlGaN/GaN HEMT: self-consistent simulation study - Invited. In: 14th IEEE International Symposium on Asynchronous Circuits and Systems ASYNC 2008, Newcastle, UK, 7-11th April, 2008, xv.

Asenov, A. (2008) Statistical device variability and its impact on low power digital circuit design. In: Proceeding FTFC 2008, Louvain La Neuve, Belgium, 27-28 May 2008, pp. 29-34.

Asenov, A. et al. (2008) Advanced simulation of statistical variability and reliability in nano CMOS transistors. In: IEDM 2008. IEEE International Electron Devices Meeting, 2008, San Francisco, CA, 15-17 Dec 2008, p. 421. ISBN 9781424423774 (doi:10.1109/IEDM.2008.4796712)

Asenov, A. et al. (2008) Meeting the design challenges of nano-CMOS electronics, design automation and test in Europe. In: Workshop on Impact of Process Variability on Design and Test, Munich, Germany, 10-14 Mar 2008,

Balaz, D., Kalna, K., Kuball, M., Uren, M. and Asenov, A. (2008) Impact of the Field Induced Polarization Space-Charge on the Characteristics of AlGaN/GaN HEMT: Self-Consistent Simulation Study. In: International Workshop On Nitride Semiconductors, Montreux, Switzerland, Oct. 6-10, 2008, We7-C4.

Bindu, B., Cheng, B., Roy, G., Wang, X., Roy, S. and Asenov, A. (2008) An efficient data sampling strategy for statistical parameter extraction of nano-MOSFETs. In: IEEE Workshop on Compact Modeling, Hakone, Japan, 8 Sept 2008,

Brown, A. R. and Asenov, A. (2008) Capacitance fluctuations in bulk MOSFETs due to random discrete dopants. Journal of Computational Electronics, 7(3), pp. 115-118. (doi:10.1007/s10825-008-0181-y)

Bukhori, M. F., Roy, S. and Asenov, A. (2008) Statistical simulation of RTS amplitude distribution in realistic bulk MOSFETs subject to random discreet dopants. In: 9th International Conference on Ultimate Integration of Silicon, 2008. ULIS 2008., Udine, Italy, pp. 171-174. ISBN 978-1-4244-1729-2 (doi:10.1109/ULIS.2008.4527166)

Bukhori, M. F., Roy, S. and Asenov, A. (2008) Statistical aspects of reliability in bulk MOSFETs with multiple defect states and random discrete dopants. Microelectronics Reliability, 48(8-9), pp. 1549-1552. (doi:10.1016/j.microrel.2008.06.029)

Cathignol, A., Cheng, B., Chanemougame, D., Brown, A. R., Rochereau, K., Ghibaudo, G. and Asenov, A. (2008) Quantitative evaluation of statistical variability sources in a 45-nm-technological node LP N-MOSFET. IEEE Electron Device Letters, 29(6), pp. 609-611. (doi:10.1109/LED.2008.922978)

Cheng, B., Roy, S., Brown, A., Millar, C. and Asenov, A. (2008) Evaluation of Intrinsic Parameter Fluctuations on 45, 32 and 22nm Technology Node LP N-MOSFETs. In: ESSDERC 2008: Proceedings of the 38th European Solid-State Device Research Conference. Series: Proceedings of the European Solid-State Device Research Conference. IEEE: New York, pp. 47-50. ISBN 978-1-4244-2363-7 (doi:10.1109/ESSDERC.2008.4681695)

Cheng, B., Roy, S., Brown, A.R., Millar, C. and Asenov, A. (2008) Statistical variations in 32nm thin-body SOI devices and SRAM cells. In: 9th International Conference on Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. IEEE, pp. 389-392. ISBN 9781424421855 (doi:10.1109/ICSICT.2008.4734546)

Drysdale, T. D., Brown, A. R., Roy, G., Roy, S. and Asenov, A. (2008) Capacitance variability of short range interconnects. Journal of Computational Electronics, 7(3), pp. 124-127. (doi:10.1007/s10825-007-0154-6)

Hill, R.J.W., Moran, D.A.J., Li, X., Zhou, H., Macintyre, D.S., Thoms, S., Asenov, A. and Thayne, I.G. (2008) Ino.75Gao.25As channel III–V MOSFETs with leading performance metrics. In: Proceedings of the IEEE Silicon Nanoelectronics Workshop, 15-16 June 2008, Honolulu, Hawaii. IEEE Computer Society: Piscataway, N.J., USA. ISBN 9781424420711 (doi:10.1109/SNW.2008.5418447)

Kalna, K. et al. (2008) III-V MOSFETs for digital applications with silicon co-integration. In: 7th International Conference on Advanced Semiconductor Devices and Microsystems, Smolenice, Slovakia, 12-16 October 2008, pp. 39-46. ISBN 9781424423255 (doi:10.1109/ASDAM.2008.4743354)

Kalna, K., Martinez, A., Svizhenko, A., Anantram, M. P., Barker, J. R. and Asenov, A. (2008) NEGF Simulations of the effect of strain on scaled double gate NanoMOSFETs. Journal of Computational Electronics, 7(3), pp. 288-292. (doi:10.1007/s10825-008-0212-8)

Kamsani, N.A., Cheng, B., Roy, S. and Asenov, A. (2008) Statistical circuit simulation with supply-voltage scaling in nanometre MOSFET devices under the influence of random dopant fluctuations. In: Faible Tension Faible Consommation (FTFC) 2008, Louvain La Neuve, Belgium, 26-28 May 2008, pp. 95-99.

Kamsani, N.A., Cheng, B., Roy, S. and Asenov, A. (2008) Statistical circuit simulation with the effect of random discrete dopants in nanometer MOSFET devices. In: Design Automation and Test in Europe: Workshop W2, Impact of Process Variability on Design and Test, Munich, Germany, 10-14 March 2008,

Kovac, U., Reid, D., Millar, C., Roy, G., Roy, S. and Asenov, A. (2008) Statistical simulation of random dopant induced threshold voltage fluctuations for 35 nm channel length MOSFET. Microelectronics Reliability, 48(8-9), pp. 1572-1575. (doi:10.1016/j.microrel.2008.06.027)

Markov, S., Roy, S., Fiegna, C., Sangiorgi, E. and Asenov, A. (2008) On the sub-nm EOT scaling of high-kappa gate stacks. In: International Conference on the Ultimate Integration of Silicon, Udine, Italy, 13-14 Mar 2008,

Markov, S., Sushko, P.V., Roy, S., Fiegna, C., Sangiorgi, E., Shluger, A.L. and Asenov, A. (2008) Si-Sio(2) interface band-gap transition - effects on MOS inversion layer. Physica Status Solidi A: Applications and Materials Science, 205(6), pp. 1290-1295. (doi:10.1002/pssa.200778154)

Martinez, A., Barker, J. R., Bescond, M., Brown, A. R. and Asenov, A. (2008) Performance variability in wrap-round gate silicon nano-transistors: a 3D self-consistent NEGF study of ballistic flows for atomistically-resolved source and drain - art. no. 012026. In: Goodnick, S.M. and Ferry, D.K. (eds.) International Symposium on Advanced Nanodevices and Nanotechnology. Series: Journal of Physics Conference Series (109). IOP Publishing: Bristol, p. 12026. ISBN 1742-6588

Martinez, A., Barker, J. R., Svizhenko, A., Anantram, M. P., Bescond, M. and Asenov, A. (2008) Ballistic Quantum Simulators for Studying Variability in Nanotransistors. Journal of Computational and Theoretical Nanoscience, 5(12), pp. 2289-2310. (doi:10.1166/jctn.2008.1201)

Martinez, A., Barker, J.R., Brown, A., Asenov, A. and Seoane, N. (2008) Simulation of impurities with an attractive potential in fully 3-D real-space Non-Equilibrium Green's Function quantum transport simulations. In: nternational Conference on Simulation of Semiconductor Processes and Devices, 2008, Hakone, Japan, 9-11 Sept 2008, pp. 341-344. (doi:10.1109/SISPAD.2008.4648307)

Martinez, A., Bescond, M., Brown, A., Barker, J. R. and Asenov, A. (2008) A full 3D non-equilibrium Green functions study of a stray charge in a nanowire MOS transistor. Journal of Computational Electronics, 7(3), pp. 359-362. (doi:10.1007/s10825-008-0240-4)

Martinez, A., Kalna, K., Svizhenko, A., Anantram, M.P., Barker, J.R. and Asenov, A. (2008) Impact of strain on scaling of Double Gate nanoMOSFETs using NEGF approach. Physica Status Solidi C, 5(1), pp. 47-51.

Millar, C., Madathil, R., Beckstein, O., Sansom, M. S. P., Roy, S. and Asenov, A. (2008) Brownian simulation of charge transport in α-Haemolysin. Journal of Computational Electronics, 7(1), pp. 28-33. (doi:10.1007/s10825-008-0230-6)

Millar, C., Reid, D., Roy, G., Roy, S. and Asenov, A. (2008) Accurate statistical description of random dopant-induced threshold voltage variability. IEEE Electron Device Letters, 29(8), pp. 946-948. (doi:10.1109/LED.2008.2001030)

Paluchowski, S. H., Cheng, B., Roy, S., Asenov, A. and Cumming, D. R. S. (2008) Investigation into effects of device variability on CMOS layout motifs. Electronics Letters, 44(10), pp. 626-627. (doi:10.1049/el:20080447)

Passlack, M., Droopad, R., Thayne, I.G. and Asenov, A. (2008) III-V MOSFETs for future transistor applications. Solid State Technology, 51(12), pp. 26-30.

Reid, D., Millar, C., Asenov, A., Roy, S., Roy, G., Sinnott, R.O. and Stewart, G. (2008) Supporting statistical semiconductor device analysis using EGEE and OMII-UK middleware. In: EGEE User Conference, Clermond Ferrand, France, Feb 2008,

Reid, D., Millar, C., Roy, G., Roy, S., Sinnott, R.O., Stewart, G. and Asenov, A. (2008) Prediction of random dopant induced threshold voltage fluctuations in NanoCMOS transistors. In: Proceedings of the International Conference on Simulation of Semiconductor Processes and Devices, 9-11 Sept 2008, Hakone, Japan. IEEE Computer Society: Piscataway, N.J., USA, pp. 21-24. ISBN 9781424417537 (doi:10.1109/SISPAD.2008.4648227)

Reid, D., Millar, C., Roy, G., Roy, S., Sinnott, R.O., Stewart, G. and Asenov, A. (2008) An accurate statistical analysis of random dopant induced variability in 140,000 13nm MOSFET. In: Proceedings of the IEEE Silicon Nanoelectronics Workshop, 15-16 June 2008, Honolulu, Hawaii. IEEE Computer Society: Piscataway, N.J., USA. ISBN 9781424420711 (doi:10.1109/SNW.2008.5418478)

Reid, D., Millar, C., Roy, S., Roy, G., Sinnott, R., Stewart, G. and Asenov, A. (2008) An accurate statistical analysis of random dopant induced variability in 140,00013nm MOSFETs. IEEE, pp. 79-80. ISBN 9781424420711 (doi:10.1109/SNW.2008.5418478)

Reid, D., Sinnott, R.O., Millar, C., Roy, G., Roy, S., Stewart, G., Stewart, G. and Asenov, A. (2008) Enabling cutting-edge semiconductor simulation through grid technology. In: UK e-Science All Hands Meeting, Edinburgh, UK, 8-11 Sep 2008,

Riddet, C. and Asenov, A. (2008) Convergence properties of density gradient quantum corrections in 3D ensemble Monte Carlo simulations. In: International Conference on Simulation of Semiconductor Processes and Devices, 2008. SISPAD 2008, Hakone, Japan, 9-11 Sept. 2008, pp. 261-264. (doi:10.1109/SISPAD.2008.4648287)

Seoane, N., Garcia-Loureiro, A. J., Kalna, K. and Asenov, A. (2008) Random dopant related variability in the 30 nm gate length In0.75Ga0.25As implant free MOSFET. Journal of Computational Electronics, 7(3), pp. 159-163. (doi:10.1007/s10825-008-0233-3)

Sinnott, R.O. et al. (2008) Secure, performance-oriented data management for nanoCMOS electronics. In: Fourth IEEE International Conference on E-Science: 7-12 December 2008, Indiana, USA. IEEE Computer Society: Piscataway, N.J., USA, pp. 87-94. (doi:10.1109/eScience.2008.21)

Sinnott, R.O. et al. (2008) Integrating security solutions to support nanoCMOS electronics research. In: Proceedings of the 2008 International Symposium on Parallel and Distributed Processing with Applications: 10-12 December 2008, Sydney, NSW, Australia. IEEE Computer Society: Los Alamitos, USA, pp. 71-79. ISBN 9780769534718 (doi:10.1109/ISPA.2008.132)

Sinnott, R.O., Berry, D., Harbulot, B., Millar, C., Reid, D., Roy, G., Roy, S., Stewart, G. and Asenov, A. (2008) Meeting the design challenges of nanoCMOS electronics through secure large-scale simulation and data management. In: EGEE'08, Istanbul, Turkey, 22-26 Sep 2008,

Wang, X., Cheng, B., Roy, S. and Asenov, A. (2008) Simulation of strain enhanced variability in nMOSFETs. In: 9th International Conference on Ultimate Integration of Silicon, 2008. ULIS 2008., Udine, Italy, 12-14 March 2008, pp. 89-92. (doi:10.1109/ULIS.2008.4527147)

Wang, X., Roy, S. and Asenov, A. (2008) High performance MOSFET scaling study from bulk 45nm technology generation. In: Proceeding of the 9th International Conference on Solid-State and Integrated-Circuit Technology: 20-23 October 2008, Beijing, China. IEEE Computer Society: Piscataway, N.J., USA, pp. 484-487. ISBN 9781424421855 (doi:10.1109/ICSICT.2008.4734586)

Wang, X., Roy, S. and Asenov, A. (2008) Impact of strain on LER variability in bulk MOSFETs. In: Proceedings of the 38th European Solid-state Device Research Conference, 15-19 September 2008, Edinburgh, UK. IEEE Computer Society: Piscataway, N.J., USA, pp. 190-193. ISBN 9781424423637 (doi:10.1109/ESSDERC.2008.4681730)

2007

Hill, R.J.W. et al. (2007) Enhancement-mode GaAs MOSFETs with an In0.3 Ga0.7As channel, a mobility of over 5000 cm2/V ·s, and transconductance of over 475 μS/μm. IEEE Electron Device Letters, 28(12), pp. 1080-1082. (doi:10.1109/LED.2007.910009)

Brown, A.R., Roy, G. and Asenov, A. (2007) Poly-Si-gate-related variability in decananometer MOSFETs with conventional architecture. IEEE Transactions on Electron Devices, 54(11), pp. 3056-3063. (doi:10.1109/TED.2007.907802)

Martinez, A., Barker, J.R., Asenov, A., Svizhenko, A. and Anantram, M.P. (2007) Developing a full 3D NEGF simulator with random dopant and interface roughness. Journal of Computational Electronics, 6(1-3), pp. 215-218. (doi:10.1007/s10825-006-0104-8)

Martinez, A., Bescond, M., Barker, J.R., Svizhenko, A., Anantram, M.P., Millar, C. and Asenov, A. (2007) A self-consistent full 3-D real-space NEGF simulator for studying nonperturbative effects in nano-MOSFETs. IEEE Transactions on Electron Devices, 54(9), pp. 2213-2222. (doi:10.1109/TED.2007.902867)

Sinnott, R.O., Asenov, A., Brown, A., Millar, C., Roy, G., Roy, S. and Stewart, G. (2007) Grid infrastructures for the electronics domain: requirements and early prototypes from an EPSRC pilot project. In: Cox, S.J. (ed.) Proceedings of the UK e-Science All Hands Meeting 2007, Nottingham, UK, 10th-13th September 2007. National e-Science Centre: Edinburgh. ISBN 9780955398834

Ferrari, G., Watling, J.R., Roy, S., Barker, J.R. and Asenov, A. (2007) Beyond SiO2 technology: simulation of the impact of high-κ dielectrics on mobility. Journal of Non-Crystalline Solids, 353(5-7), pp. 630-634. (doi:10.1016/j.jnoncrysol.2006.10.044)

Markov, S., Brown, A.R., Cheng, B.J., Roy, G., Roy, S. and Asenov, A. (2007) Three-dimensional statistical simulation of gate leakage fluctuations due to combined interface roughness and random dopants. Japanese Journal of Applied Physics, 46(4S), pp. 2112-2116. (doi:10.1143/JJAP.46.2112)

Passlack, M. et al. (2007) High mobility III-V MOSFETs for RF and digital applications. In: IEEE International Electron Devices Meeting (IEDM 2007), Washington DC, USA, 10-12 December 2007, pp. 621-624. ISBN 9781424415083 (doi:10.1109/IEDM.2007.4419016)

Kalna, K., Wilson, J.A., Moran, D.A.J., Hill, R.J.W., Long, A.R., Droopad, R., Passlack, M., Thayne, I.G. and Asenov, A. (2007) Monte Carlo simulations of high-performance implant free In0.3Ga0.7 nano-MOSFETs for low-power CMOS applications. IEEE Transactions on Nanotechnology, 6(1), pp. 106-112. (doi:10.1109/TNANO.2006.888543)

Asenov, A., Kalna, K., Thayne, I. and Hill, R. (2007) Simulation of implant free III-V MOSFETs for high performance low power Nano-CMOS applications. Microelectronic Engineering, 84, pp. 2398-2403. (doi:10.1016/j.mee.2007.04.117)

Asenov, A. et al. (2007) Meeting the design challenges of nanoCMOS electronics. In: Third International Nanotechnology Conference on Communication and Cooperation, Brussels, Belgium, 17-19 Apr 2007,

Cheng, B., Roy, S. and Asenov, A. (2007) CMOS 6-T SRAM cell design subject to ''atomistic" fluctuations. Solid-State Electronics, 51, pp. 565-571. (doi:10.1016/j.sse.2007.02.009)

Ferrari, G., Watling, J.R., Roy, S., Barker, J.R. and Asenov, A. (2007) Beyond SiO2 technology: Simulation of the impact of high-kappa dielectrics on mobility. Journal of Non-Crystalline Solids, 353, pp. 630-634. (doi:10.1016/j.jnoncrysol.2006.10.004)

Fujihashi, C., Yukiya, T. and Asenov, A. (2007) Electron and hole current characteristics of n-i-p-type semiconductor quantum dot transistor. IEEE Transactions on Nanotechnology, 6, pp. 320-327. (doi:10.1109/TNANO.2007.893570)

Han, L., Asenov, A., Berry, D., Millar, C., Roy, G., Roy, S., Sinnott, R.O. and Stewart, G. (2007) Towards a grid-enabled simulation framework for nano-CMOS electronics. In: 3rd IEEE International Conference on e-Science and Grid Computing, Bangalore, India, 10-13 Dec 2007, pp. 305-311. (doi:10.1109/E-SCIENCE.2007.78)

Kalna, K., Droopad, R., Passlack, M. and Asenov, A. (2007) Monte Carlo simulations of InGaAs nano-MOSFETs. Microelectronic Engineering, 84, pp. 2150-2153. (doi:10.1016/j.mee.2007.04.011)

Martinez, A., Barker, J., Svizhenko, A., Anantram, M. and Asenov, A. (2007) The impact of random dopant aggregation in source and drain on the performance of ballistic DG Nano-MOSFETs: A NEGF study. IEEE Transactions on Nanotechnology, 6, pp. 438-445. (doi:10.1109/TNANO.2007.899638)

Martinez, A., Kalna, K., Barker, J. and Asenov, A. (2007) A study of the interface roughness effect in Si nanowires using a full 3D NEGF approach. Physica E: Low-Dimensional Systems and Nanostructures, 37, pp. 168-172. (doi:10.1016/j.physe.2006.07.007)

Millar, C., Roy, S., Brown, A.R. and Asenov, A. (2007) Simulating the bio-nanoelectronic interface. Journal of Physics: Condensed Matter, 19, (doi:10.1088/0953-8984/19/21/215205)

Moran, D. A. J. et al. (2007) III-V Enhancement Mode MOSFETs for Digital Applications. In: IBM MRC Oxide Workshop, Zurich, Switzerland, 25-27 June 2007,

Moran, D. A. J. et al. (2007) High Performance Enhancement-Mode III-V MOSFETs. In: UK Compound Semiconductor Conference 2007, Sheffield, UK, 2007,

Moran, D.A.J. et al. (2007) High Performance Enhancement Mode III-V MOSFETs. IBM Workshop on Advanced Oxides, Zurich, Switzerland, June 2007.

Riddet, C., Brown, A.R., Alexander, C.L., Watling, J.R., Roy, S. and Asenov, A. (2007) 3-D Monte Carlo simulation of the impact of quantum confinement scattering on the magnitude of current fluctuations in double gate MOSFETs. IEEE Transactions on Nanotechnology, 6, pp. 48-55. (doi:10.1109/TNANO.2006.886739)

Samsudin, K., Adamu-Lerna, F., Brown, A.R., Roy, S. and Asenov, A. (2007) Combined sources of intrinsic parameter fluctuations in sub-25 nm generation UTB-SOI MOSFETs: A statistical simulation study. Solid-State Electronics, 51, pp. 611-616. (doi:10.1016/j.sse.2007.02.022)

Seoane, N., Garcia-Loureiro, A.J., Kalna, K. and Asenov, A. (2007) Impact of intrinsic parameter fluctuations on the performance of HEMTs studied with a 3D parallel drift-diffusion simulator. Solid-State Electronics, 51, pp. 481-488. (doi:10.1016/j.sse.2007.01.030)

Thayne, I. G. et al. (2007) High Performance Enhancement Mode III-V MOSFETs for Silicon Co-Integration. In: Silicon Nanoelectronics Workshop, Kyoto, Japan, 10-11 June 2007,

Thayne, I.G. et al. (2007) Recent Progress in III-V MOSFETs. In: UK Condensed Matter and Material Physics Conference, Leicester, UK, April 2007,

2006

Roy, G., Brown, A.R., Adamu-Lema, F., Roy, S. and Asenov, A. (2006) Simulation study of individual and combined sources of intrinsic parameter fluctuations in conventional nano-MOSFETs. IEEE Transactions on Electron Devices, 53(12), pp. 3063-3070. (doi:10.1109/TED.2006.885683)

Alexander, C., Roy, G. and Asenov, A. (2006) Increased intrinsic parameter fluctuations through ab initio Monte Carlo simulations in nano-scaled MOSFETs. In: International Electron Devices Meeting 2006, IEDM, San Fransisco, CA, USA,

Asenov, A. (2006) A 3D finite element parallel simulator for studying fluctuations in advanced MOSFETs. In: 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, p. 37.

Asenov, A. (2006) Green function study of quantum transport in ultra-small devices with embedded atomistic cluster. Journal of Physics: Conference Series, 38(1), pp. 233-246. (doi:10.1088/1742-6596/35/1/021)

Asenov, A. (2006) The unintentional discrete charges in a nominally undoped channel of a thin body double gate MOSFET: Classical to Full Quantum Simulation. Journal of Physics: Conference Series, 38(1), pp. 192-195. (doi:10.1088/1742-6596/38/1/046)

Asenov, A., Brown, A., Roy, G., Alexander, C. and Martinez, A. (2006) Simulation of Atomic Scale Effects and Fluctuations in nano-scale CMOS. In: International Conference on Solid State Devices and Materials. (SSDM 2006)., Yokohama,Japan,

Asenov, A. and Samsudin, K. (2006) Variability in nanoscale SOI devices and its impact on circuits and systems. In: Nano Scaled Semiconductor-on-Insulator Structures and Devices, Crimea, Ukraine, p. 79.

Barker, J.R., Martinez, A., Svizhenko, A., Anantram, A. and Asenov, A. (2006) Green function study of quantum transport in ultra-small devices with embedded atomistic clusters. Journal of Physics: Conference Series, 35, pp. 233-246. (doi:10.1088/1742-6596/35/1/021)

Bescond, M., Cavassilas, N., Asenov, A. and Lannoo, M. (2006) Effective-mass approach for n-type semiconductor nanowire MOSFET's arbitrary oriented. In: 7 th European Workshop on ULtimate Integration of Silicon, ULIS 2006, Grenoble, France, pp. 73-76. ISBN 88-900874-0-8

Brown, A., Roy, G. and Asenov, A. (2006) Impact of Fermi level pinning at polysilicon gate grain boundaries on nano-MOSFET variability:A 3-D simulation study. In: 34th European Solid State Devices Research Conference, Montreux, Switzerland, pp. 451-454.

Brown, A., Watling, J. and Asenov, A. (2006) Intrinsic parameter fluctuations due to random grain orientation in the high-k stacks. In: 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, p. 49.

Cheng, B., Roy, S. and Asenov, A. (2006) Low power, high density CMOS 6-T SRAM cell design subject to 'atomistic' fluctuations. In: 7th European Workshop on ULtimate Integration of Silicon, ULIS 2006, Grenoble, France, pp. 33-36.

Cheng, B., Roy, S. and Asenov, A. (2006) The impact of intrinsic parameter fluctuations on decananometer circuits and circuit modelling techniques. In: Mixed Design of Integrated Circuits and System, MIXDES 2006, Gdynia, Poland, pp. 117-121. ISBN 88-900874-0-8

Cheng, B., Roy, S., Roy, G., Brown, A. and Asenov, A. (2006) Design consideration of 6-T SRAM towards the End Of Bulk CMOS Technology scaling subjected to randon dopant fluctuations. In: 34th European Solid State Devices Research Conference, Montreux, Switzerland, pp. 258-261.

Ferrari, G., Jacoboni, C., Nedialkov, M. and Asenov, A. (2006) Introducing energy broadening in semiclassical Monte Carlo simulations. In: 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, p. 17.

Ferrari, G., Watling, J., Roy, S., Barker, J. and Asenov, A. (2006) Beyond SiO2 technology: The impact of high-k dielectrics. In: 6th symposium SiO2 , advanced dielectrics and related devices : SiO2006, Palermo, Italy,

Ferrari, G., Watling, J., Roy, S., Barker, J., Zeitzoff, P., Bersuker, G. and Asenov, A. (2006) Monte Carlo study of mobility in Si devices with HfO2 based oxides. In: E-MRS IUMRS ICEM 2006, Nice, France, Symposium.

Ferrari, G., Watling, J., Roy, S., Barker, J., Zeitzoff, P., Bersuker, G. and Asenov, A. (2006) Monte Carlo study of mobility in Si devices with HfO2-based oxides. Materials Science in Semiconductor Processing, 9, pp. 995-999. (doi:10.1016/j.mssp.2006.10.035)

Ferrari, G., Watling, J., Roy, S., Barker, J., Zeitzoff, P., Bersuker, G. and Asenov, A. (2006) On the impact of high-k gate stacks on mobility: a Monte Carlo study including coupled SO phonon-plasmon scattering. In: 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, p. 111.

Kalna, K., Hill, R., Wilson, J., Moran, D., Long, A., Asenov, A. and Thayne, I. (2006) Monte Carlo simulation of sub-30 nm high indium implant free III-V MOSFETs for low power digital applications. In: UK III-V Compound Semiconductors 2006, Sheffield, UK, D-0-3.

Kalna, K., Wang, Q., Passlack, M. and Asenov, A. (2006) MC simulation of delta doping placement in sub 100nm implant free InGaAs MOSFETs. In: E-MRS IUMRS ICEM 2006, Nice, France, Symposium.

Kalna, K., Wilson, J., Moran, D., Hill, R., Long, A., Droopad, R., Passlack, M., Thayne, I. and Asenov, A. (2006) MC simulation of high performance InGaAs nano-MOSFETs for low power CMOS applications. In: IEEE 2006 Silicon Nanoelectronics Workshop, Honolulu, p. 13.

Kalna, K., Asenov, A. and Passlack, M. (2006) Monte Carlo simulation of implant free InGaAs MOSFET. In: Seventh International Conference on New Phenomena in Mesoscopic Structures and the Fifth International Conference on Surfaces and Interfaces of Mesoscopic Devices, Maui, Hawaii, 27 November - 2 December 2005, pp. 200-203. (doi:10.1088/1742-6596/38/1/048)

Kalna, K., Wang, Q., Passlack, M. and Asenov, A. (2006) Monte Carlo simulations of delta-doping placement in sub-100 nm implant free InGaAs MOSFETs. Materials Science and Engineering B: Solid-State Materials for Advanced Technology, 135, pp. 285-288. (doi:10.1016/j.mseb.2006.08.019)

Markov, S., Brown, A., Cheng, B., Roy, G., Roy, S. and Asenov, A. (2006) 3D statistical simulation of gate leakage fluctutations due to combined interface roughness and random dopants. In: International Conference on Solid State Devices and Materials. (SSDM 2006)., Yokohama,Japan, pp. 362-363.

Martinez, A., Barker, J., Svizhenko, A., Anantram, A., Bescond, M. and Asenov, A. (2006) Development of a Full 3D NEGF Nano-CMOS simulator. In: International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2006, California,USA,

Martinez, A., Kalna, K., Barker, J. and Asenov, A. (2006) A study of the interface roughness effects in Si-nanowires using a full 3D NEGF approach. In: E-MRS IUMRS ICEM 2006, Nice, France, Symposium.

Martinez, A., Barker, J.R., Anantram, A., Svizhenko, A. and Asenov, A. (2006) Developing a full 3D NEGF simulator with random dopant and interface roughness. In: 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, pp. 215-218.

Martinez, A., Barker, J.R., Svizhenko, A., Anantram, A. and Asenov, A. (2006) The impact of random dopant aggregation in source and drain in the performance of ballistic DG nano-MOSFETs. In: IEEE 2006 Silicon Nanoelectronics Workshop, Honolulu, p. 133.

Martinez, A., Svizhenko, A., Anantram, M.P., Barker, J.R. and Asenov, A. (2006) A NEGF study of the effect of surface roughness on CMOS nanotransistors. Journal of Physics: Conference Series, 35(1), pp. 269-274. (doi:10.1088/1742-6596/35/1/024)

Millar, C., Roy, S. and Asenov, A. (2006) Simulation of Bio-Nano-CMOS devices. In: E-MRS IUMRS ICEM 2006, Nice, France, Symposium.

Millar, C., Roy, S., Beckstein, O., Sansom, M. and Asenov, A. (2006) Continuum versus particle simulation of model nano-pores. In: 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, p. 367.

Riddet, C., Brown, A., Alexander, C., Roy, S. and Asenov, A. (2006) Efficient density gradient quantum corrections for 3D Monte Carlo simulations. In: International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2006, California,USA,

Roy, S., Cheng, B. and Asenov, A. (2006) Impact of intrinsic parameter fluctuation in nano-CMOS devices on circuits and systems. In: International Topical Workshop on Tera- and Nano- Devices: Physics and Modelling, Aizu-Wakamatsu, Japan, pp. 24-25.

Samsudin, K., Adamu-Lema, F., Brown, A., Roy, S. and Asenov, A. (2006) Intrinsic parameter fluctuations in sub-10nm generation UTB SOI MOSFETs. In: 7 th European Workshop on ULtimate Integration of Silicon, ULIS 2006, Grenoble, France, pp. 93-96. ISBN 88-900874-0-8

Samsudin, K., Cheng, B., Brown, A.R., Roy, S. and Asenov, A. (2006) Integrating intrinsic parameter fluctuation description into BSIMSOI to forecast sub-15 nm UTB SOI based 6T SRAM operation. Solid-State Electronics, 50, pp. 86-93. (doi:10.1016/j.sse.2005.10.048)

Samsudin, K., Cheng, B., Brown, A.R., Roy, S. and Asenov, A. (2006) Sub-25 nm UTB SOISRAM cell under the influence of discrete random dopants. Solid-State Electronics, 50, pp. 660-667. (doi:10.1016/j.sse.2006.03.019)

Seoane, N., Garcia-Loureiro, A., Kalna, K. and Asenov, A. (2006) A 3D parallel simulation of the effect of interface charge fluctuations in HEMTs. In: 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, p. 81.

Sinnott, R.O. et al. (2006) Meeting the design challenges of nano-CMOS electronics: an introduction to an upcoming EPSRC pilot project. In: Cox, S.J. (ed.) Proceedings of the UK e-Science All Hands Meeting 2006 : Nottingham, UK, 18th-21st September. National e-Science Centre: Edinburgh. ISBN 9780955398810

Thayne, I.G. et al. (2006) III-V MOSFETs for Digital Applications: An Overview. In: UK III-V Compound Semiconductors 2006, Sheffield, UK,

2005

Cheng, B., Roy, S., Roy, G., Adamu-Lema, F. and Asenov, A. (2005) Impact of intrinsic parameter fluctuations in decanano MOSFETs on yield and functionality of SRAM cells. Solid-State Electronics, 49(5), pp. 740-746. (doi:10.1016/j.sse.2004.09.005)

Alexander, C., Brown, A.R., Watling, J.R. and Asenov, A. (2005) Impact of scattering in 'atomistic' device simulations. Solid-State Electronics, 49, pp. 733-739. (doi:10.1016/j.sse.2004.10.012)

Alexander, C., Brown, A., Watling, J. and Asenov, A. (2005) Impact of single charge trapping in nano-MOSFETs - Electrostatics versus transport effects. IEEE Transactions on Nanotechnology, 4, pp. 339-344. (doi:10.1109/TNANO.2005.846929)

Asenov, A. (2005) Monte Carlo simulation of nanotransistors and giga circuits on HPC. In: 5th International Conference on Large-Scale Scientific Computations, Sozopol, Bulgaria,

Asenov, A. (2005) Nano CMOS devices and their integration in giga transistor chips. In: Future of Intergrated Systems - FIS, Cambridge, UK,

Barker, J., Martinez, A., Svizhenko, A., Anantram, M. and Asenov, A. (2005) Green function study of quantum transport in ultrasmall devices with embedded atomistic clusters. In: 3rd International Workshop on Progress in non-equilibrium Green functions, Kiel, Germany,

Barker, J., Watling, J., Brown, A., Roy, S., Zeitzoff, P., Bersuker, G. and Asenov, A. (2005) Monte Carlo study of coupled SO phonon-plasmon scattering in Si MOSFETs with high k dielectric gate stacks: hot electron and disorder effects. In: 14th International Conference on Nonequilibrium Carrier Dynamics in Semiconductors - HCIS, Chicago, USA,

Bescond, M., Cavassilas, N., Kalna, K., Autran, J., Lannoo, M. and Asenov, A. (2005) Simulation study of performance limits for Si, Ge, GaAs ballistic nanowire MOSFETs. In: Silicon Nanoelectronics Workshop 2005, Kyoto, Japan, pp. 8-9.

Bescond, M., Cavassilas, N., Kalna, K., Nehari, K., Raymond, L., Autran, J., Lanu, M. and Asenov, A. (2005) Ballistic transport in Si, Ge and GaAs Nanowire MOSFETs. In: IEEE International Electron Device Meeting, Washington DC, USA, pp. 533-536.

Bescond, M., Cavassilas, N., Nehari, K., Autran, J., Lannoo, M. and Asenov, A. (2005) Impact of point defects in nanowire silicon MOSFETs. In: European Solid-State Device Research Conference 2005 - ESSDERC2005, Grenoble, France,

Bescond, M., Cavassilas, N., Raymond, L. and Asenov, A. (2005) Effective masses in arbitrary oriented ballistic nanowire MOSFETS. In: 14th International Conference on Nonequilibrium Carrier Dynamics in Semiconductors - HCIS, Chicago, USA, p. 42.

Brown, A., Watling, J., Asenov, A., Bersuker, G. and Zeitzoff, P. (2005) Intrinsic parameter fluctuations in MOSFETs due to structural non-uniformity of high-kappa gate stack materials. In: SISPAD: 2005 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES, TOKYO, pp. 27-30.

Garcia-Loureiro, A.J., Kalna, K. and Asenov, A. (2005) Efficient three-dimensional parallel simulations of PHEMTs. International Journal of Numerical Modelling-Electronic Networks Devices and Fields, 18, pp. 327-340. (doi:10.1002/jnm.581)

Garcia-Loureiro, A., Kalna, K. and Asenov, A. (2005) New sources of intrinsic parameter fluctuations introduced by a high-k dielectric in sub-100nm Si MOSFETs. In: 18th International Conference on Noise and Fluctuations, Salamanca, Spain, pp. 239-242. ISBN 0-7354-0267-1

Kalna, K., Asenov, A. and Passlack, M. (2005) Monte Carlo simulation of implant free InGaAs MOSFETs. In: New Phenomena in Mesoscopic Structures - 7 (NPMS) and the fifth in the series of Surfaces and Interfaces of Mesoscopic Devices (SIMD), NPMS-7/SIMD-5, Maui, Hawaii,

Kalna, K., Elgaid, K., Thayne, I. and Asenov, A. (2005) Modelling of InPHEMTs with high indium content channels. In: 2005 INTERNATIONAL CONFERENCE ON INDIUM PHOSPHIDE AND RELATED MATERIALSConference proceedings - indium phosphide and related materials, NEW YORK, pp. 192-195. ISBN 1092-8669

Kalna, K., Yang, L. and Asenov, A. (2005) Fermi-dirac statistics in Monte Carlo simulations of InGaAs MOSFETs. In: 14th International Conference on Nonequilibrium Carrier Dynamics in Semiconductors - HCIS, Chicago, USA,

Kalna, K., Yang, L. and Asenov, A. (2005) Monte Carlo simulation of sub-100nm InGaAs MOSFETs for digital applications. In: European Solid-State Device Research Conference 2005 - ESSDERC2005, Grenoble, France,

Martinez, A., Barker, J., Svizhenko, A., Anantram, M., Brown, A., Biegel, B. and Asenov, A. (2005) The impact of unintentional discrete charges in a nominally undoped channel of a thin body double gate MOSFETS: Classical to full quantum simulation. In: New Phenomena in Mesoscopic Structures - 7 (NPMS) and the fifth in the series of Surfaces and Interfaces of Mesoscopic Devices (SIMD), NPMS-7/SIMD-5, Maui, Hawaii,

Martinez, A., Barker, J., Svizhenko, A., Bescond, M., Anantram, M. and Asenov, A. (2005) A 2D-NEGF quantum transport study of unintentional charges in a double gate nanotransistor. In: 14th International Conference on Nonequilibrium Carrier Dynamics in Semiconductors - HCIS, Chicago, USA,

Martinez, A., Svizhenko, A., Anantram, M., Barker, J., Brown, A. and Asenov, A. (2005) A study of the effect of interface roughness on DG MOSFET using full 2D NEGF technique. In: IEEE International Electron Device Meeting, Washington DC, USA, pp. 627-630.

Martinez, A., Svizhenko, A., Anantram, M., Barker, J., Brown, A., Biegel, B. and Asenov, A. (2005) Impact of stray charges on the characteristics of nano-DGMOSFETs in the ballistic regime: A NEGF simulation study. In: Silicon Nanoelectronics Workshop 2005, Kyoto, Japan, pp. 76-77.

Millar, C., Asenov, A. and Roy, S. (2005) Self-consistent particle simulation of ion channels. Journal of Computational and Theoretical Nanoscience, 2, pp. 56-67. (doi:10.1166/jctn.2005.004)

Millar, C., Asenov, A., Roy, S. and Brown, A. (2005) Simulating the bio-nano-CMOS interface. In: 5th IEEE conference on Nanotechnology, Nagoya, Japan,

Riddet, C., Brown, A., Alexander, C., Watling, J., Roy, S. and Asenov, A. (2005) Impact of quantum confinement scattering on the magnitude of current fluctuations in double gate MOSFETs. In: Silicon Nanoelectronics Workshop 2005, Kyoto, Japan,

Roy, G., Adamu-Lema, F., Brown, A., Roy, S. and Asenov, A. (2005) Intrinsic parameter fluctuations in conventional MOSFETs until the end of the ITRS. In: New Phenomena in Mesoscopic Structures - 7 (NPMS) and the fifth in the series of Surfaces and Interfaces of Mesoscopic Devices (SIMD), NPMS-7/SIMD-5, Maui, Hawaii,

Roy, G., Adamu-Lema, F., Brown, A., Roy, S. and Asenov, A. (2005) Simulation of combined sources of intrinsic parameter fluctuations in 'real' 35nm MOSFET. In: European Solid-State Device Research Conference 2005 - ESSDERC2005, Grenoble, France,

Samsudin, K., Cheng, B., Brown, A., Roy, S. and Asenov, A. (2005) Impact of body thickness fluctuations in nanometer scale UTB SOI MOSFETs on SRAM cell functionality. In: 6th European Conference on ULtimate Integration of Silicon - ULIS 2005, Bologna, Italy,

Samsudin, K., Cheng, B., Brown, A.R., Roy, S. and Asenov, A. (2005) Impact of random dopant induced fluctuations on sub-15nm UTB SOI 6T SRAM cells. In: IEEE International SOI Conference, Honolulu, Hawaii, 3-6 October, pp. 60-61. ISBN 0780392124 (doi:10.1109/SOI.2005.1563533)

Samsudin, K., Cheng, B., Brown, A.R., Roy, S. and Asenov, A. (2005) UTB SOI SRAM cell stability under the influence of intrinsic parameter fluctuation. In: 35th European Solid State Device Research Conference, Grenoble, France., 12-16 September 2005, pp. 553-556. ISBN 0780392035 (doi:10.1109/ESSDER.2005.1546708)

Seone, N., Garcia-Loureiro, A., Kalna, K. and Asenov, A. (2005) Discrete doping fluctuations in the delta layer of a 50nm InP HEMT. In: MSED 2005 Modeling and Simulation of Electron Devices, Pisa, Italy,

Seone, N., Garcia-Loureiro, A., Kalna, K. and Asenov, A. (2005) Indium content fluctuations in the channel of a 120nm PHEMT. In: New Phenomena in Mesoscopic Structures - 7 (NPMS) and the fifth in the series of Surfaces and Interfaces of Mesoscopic Devices (SIMD), NPMS-7/SIMD-5, Maui, Hawaii,

Seone, N., Garcia-Loureiro, A., Kalna, K. and Asenov, A. (2005) A high performance parallel device simulator for high electron mobility transistors. In: Parallel Computing 2005, Malaga, Spain,

Watling, J., Asenov, A., Barker, J. and Roy, S. (2005) Transport in the presence of high-k dielectrics. In: Material Modelling International Workshop, London, UK,

Watling, J., Asenov, A., Barker, J. and Roy, S. (2005) The impact of the interfacial layer and structure of the k dielectric (HfO2) on device performance. In: Advanced Gate Stack Engineering Conference, Texas, USA,

Watling, J., Brown, A., Alexander, C., Ferrari, G., Barker, J., Bersuker, G., Zeitzoff, P. and Asenov, A. (2005) Electrostatic and transport variations in nano CMOS devices due to variations in high-k oxides. In: 2nd International Workshop on Advanced Gate Stack Technology, Texas, USA,

Watling, J., Yang, L., Asenov, A., Barker, J. and Roy, S. (2005) Impact of high-k dielectric HfO2 on the mobility and device performance of sub-100-nm nMOSFETs. IEEE Transactions on Device and Materials Reliability, 5, pp. 103-108. (doi:10.1109/TDMR.2005.845238)

Yang, L., Watling, J., Barker, J. and Asenov, A. (2005) The impact of soft-optical phonon scattering due to high-kappa dielectrics on the performance of sub-100nm conventional and strained Si n-MOSFETs. In: Physics of Semiconductors AIP Conference Proceedings, Melville, pp. 1497-1498. ISBN 0094-243X

2004

Adamu-Lema, F., Roy, S., Brown, A., Asenov, A. and Roy, G. (2004) Intrinsic parameter fluctuations in conventional MOSFETs at the scaling limit : a statistical study. In: International workshop on Computational Electronics, IWCE-10, West Lafayette, USA, pp. 44-45.

Alexander, C., Brown, A., Watling, J. and Asenov, A. (2004) Impact of single charge trapping in nano-MOSFETs. In: IEEE 2004 Silicon Nanoelectronics Workshop, Honolulu,

Alexander, C., Brown, A., Watling, J. and Asenov, A. (2004) Impact scattering in 'atomistic' device simulation. In: 5th European Workshop on Ultimate Integration of Silicon - ULIS04, Leuven, Belgium,

Alexander, C., Brown, A., Watling, J. and Asenov, A. (2004) Impact scattering on random dopant induced current fluctuations in devanano MOSFETs. In: Simulation of Semiconductor Processes and Devices, Munich, Germany, pp. 223-226.

Alexander, C., Watling, J. and Asenov, A. (2004) Numerical carrier heating when implementing (PM)-M-3 to study small volume variations. Semiconductor Science and Technology, 19, S139-S141. (doi:10.1088/0268-1242/19/4/049)

Asenov, A., Roy, G., Alexander, C., Brown, A., Watling, J. and Roy, S. (2004) Quantum mechanical and transport effects in resolving discrete charges in nano-CMOS device simulation. In: 4th IEEE Conference on Nanotechnology 2004, Munich, Germany,

Asenov, A., Brown, A.R. and Kaya, S. (2004) Atomistic simulation of decanano MOSFETs. In: Dabrowski, J. and Weber, E.R. (eds.) Predictive Simulation of Semiconductor Processing: Status and Challenges. Series: Springer series in materials science (72). Springer-Verlag: Berlin, Germany, pp. 111-153. ISBN 9783540204817

Borici, M., Watling, J., Wilkins, R., Yang, L., Barker, J. and Asenov, A. (2004) Interface roughness scattering and its impact on electron transport in relaxed and strained Si n-MOSFETs. Semiconductor Science and Technology, 19, S155-S157. (doi:10.1088/0268-1242/19/4/054)

Cheng, B., Roy, S. and Asenov, A. (2004) Compact model strategy for studying the impact of intrinsic parameter fluctuations on circuit performance. In: 11th International Conference Mixed Design of Integrated Circuits and Systems, Szezecin, Poland, pp. 51-55.

Cheng, B., Roy, S. and Asenov, A. (2004) The impact of random dopant effects on SRAM cells. In: 30th European Solid-State Circuits Confernece ESSCIRC 2004, Leuven, Belgium, pp. 219-222.

Cheng, B., Roy, S. and Asenov, A. (2004) The impact of random doping effects on CMOS SRAM cell. In: 30th European Solid-State Circuits Conference (ESSCIRC 2004)., Leuven, Belgium, 21-23 September 2004, pp. 219-222. ISBN 0780384806 (doi:10.1109/ESSCIR.2004.1356657)

Kalna, K., Borici, M., Yang, L. and Asenov, A. (2004) Monte Carlo simulations of III-V MOSFETs. Semiconductor Science and Technology, 19, S202-S205. (doi:10.1088/0268-1242/19/4/069)

Kalna, K., Yang, L., Watling, J. and Asenov, A. (2004) 80nm InGaAs MOSFET compared to equivalent Si transistor. In: 5th European Workshop on Ultimate Integration of Silicon - ULIS04, Leuven, Belgium, pp. 159-162.

Kalna, K. and Asenov, A. (2004) Role of multiple delta doping in PHEMTs scaled to sub-100 nm dimensions. Solid-State Electronics, 48, pp. 1223-1232. (doi:10.1016/j.sse.2004.02.008)

Lee, A., Brown, A., Asenov, A. and Roy, S. (2004) RTS amplitudes in decanano n-MOSFETs with conventional and high k gate stacks. In: International workshop on Computational Electronics, IWCE-10, West Lafayette, USA,

Lee, A., Brown, A.R., Asenov, A. and Roy, S. (2004) RTS amplitudes in decanano n-MOSFETs with conventional and high-k gate stacks. In: 10th International Workshop on Computational Electronics, West Lafayette, Indiana, 24-27 October, pp. 159-160. ISBN 0780386493

Millar, C., Asenov, A., Brown, A. and Roy, S. (2004) Tracking the propagation of individual ions through ion channels with nano-MOSFETs. In: International workshop on Computational Electronics, IWCE-10, West Lafayette, USA, pp. 205-206.

Riddet, C., Brown, A., Alexander, C., Watling, J., Roy, S. and Asenov, A. (2004) Scattering from body thickness fluctuations in double gate MOSFETs. An ab initio Monte Carlo simulation study. In: International workshop on Computational Electronics, IWCE-10, West Lafayette, USA, pp. 194-195.

Watling, J.R., Yang, L., Borici, M., Wilkins, R.C.W., Asenov, A., Barker, J.R. and Roy, S. (2004) The impact of interface roughness scattering and degeneracy in relaxed and strained Si n-channel MOSFETs. Solid-State Electronics, 48, pp. 1337-1346. (doi:10.1016/j.sse.2004.01.015)

Watling, J., Yang, L., Asenov, A., Barker, J. and Roy, S. (2004) Impact of high-k dielectric HfO2 on the mobility and device performance of sub-100nm n-MOSFETs. In: International workshop on electrical characterization and reliability of high-k devices, Austin, USA,

Watling, J., Yang, L., Barker, J. and Asenov, A. (2004) The impact of high-k dielectrics on the future performance of nano-scale MOSFETs. In: IoP Condensed Matter and Materials Physics Conference CMMP04, Warwick, UK,

Yang, L., Asenov, A., Watling, J., Borici, M., Barker, J., Roy, S., Elgaid, K., Thayne, I. and Hackbarth, T. (2004) Impact of device geometry and doping strategy on linearity and RF performance in Si/SiGe MODFETs. Microelectronics Reliability, 44, pp. 1101-1107. (doi:10.1016/j.microrel.2004.04.003)

Yang, L., Watling, J., Adamu-Lema, F., Asenov, A. and Barker, J. (2004) Scaling study of Si and strained Si n-MOSFETs with different high k gate stacks. In: IEEE International Electron Devices Meeting, San Francisco, USA,

Yang, L., Watling, J., Adamu-Lema, F., Asenov, A. and Barker, J. (2004) Simulations of sub-100nm strained Si MOSFETs with high k gate stacks. In: International workshop on Computational Electronics, IWCE-10, West Lafeyette, USA,

Yang, L., Watling, J., Asenov, A. and Barker, J. (2004) Performance degradation due to soft optical phonon scattering in conventional and strained Si MOSFETs with high-k gate dielectrics. In: 34th European Solid-State Device research Conference, ESSDERC, Leuven, Belgium,

Yang, L., Watling, J., Asenov, A., Barker, J. and Roy, S. (2004) Mobility and device performance in conventional and strained Si MOSFETs with high-k stack. In: International Conference on Simulation of Semiconductor Processes and Devices, SISPAD, Munich, Germany, pp. 199-202.

Yang, L., Watling, J., Asenov, A., Barker, J. and Roy, S. (2004) Sub-100nm strained Si CMOS : Device performance and circuit behavior. In: 7th International Conference on Solid State and Intergrated Circuit Technology, Beijing, China,

Yang, L., Watling, J., Barker, J. and Asenov, A. (2004) The impact of soft-optical phonon scattering due to high-k dielectrics on the performance of sub-1oonm conventional and strained Si n-MOSFETs. In: 27th International Conference on Physics of Semiconductors, ICPS04, Arizona, USA,

Yang, L., Watling, J., Wilkins, R., Barker, J. and Asenov, A. (2004) Monte-Carlo investigation of interface roughness scattering in relaxed and strained Si n-MOSFETs. In: Condensed Matter and Materials Physcis Conference - CMMP04, Warwick, UK,

Yang, L., Watling, J., Wilkins, R., Barker, J. and Asenov, A. (2004) Reduced interface roughness in sub-100nm strained Si n-MOSFETs - A Monte Carlo simulation study. In: 5th European Workshop on Ultimate Integration of Silicon - ULIS04, Leuven, Belgium, pp. 23-26.

Yang, L., Watling, J. R., Adam-Lema, F., Asenov, A. and Barker, J. R. (2004) Scaling study of Si and strained Si n-MOSFETs with different high-k gate stacks. In: IEEE International Electron Devices Meeting, San Francisco, California, 13-15 December 2004, pp. 597-600. ISBN 0780386841 (doi:10.1109/IEDM.2004.1419232)

Yang, L., Watling, J. R., Asenov, A., Barken, J. R. and Roy, S. (2004) Sub-100nm strained Si CMOS: device performance and circuit behavior. In: International Conference on Solid-State and Integrated Circuits Technology, Beijing, China, 18-21 October 2004, pp. 983-986. ISBN 078038511X (doi:10.1109/ICSICT.2004.1436670)

Yang, L., Watling, J., Wilkins, R., Borici, M., Barker, J., Asenov, A. and Roy, S. (2004) Si/SiGe heterostructure parameters for device simulations. Semiconductor Science and Technology, 19, pp. 1174-1182.

2003

Ma, W., Kaya, S. and Asenov, A. (2003) Study of RF linearity in sub-50nm MOSFETs using simulations. Journal of Computational Electronics, 2(2-4), pp. 347-352. (doi:10.1023/B:JCEL.0000011450.37111.9d)

Millar, C., Asenov, A. and Roy, S. (2003) Brownian ionic channel simulation. Journal of Computational Electronics, 2(2-4), pp. 257-262. (doi:10.1023/B:JCEL.0000011434.84806.6d)

Roy, S., Lee, A., Brown, A.R. and Asenov, A. (2003) Application of quasi-3D and 3D MOSFET simulations in the atomistic regime. Journal of Computational Electronics, 2(2-4), pp. 423-426. (doi:10.1023/B:JCEL.0000011464.17950.09)

Asenov, A., Brown, A.R., Davies, J.H., Kaya, S. and Slavcheva, G. (2003) Simulation of intrinsic parameter fluctuations in decananometer and nanometer-scale MOSFETs. IEEE Transactions on Electron Devices, 50(9), pp. 1837-1852. (doi:10.1109/TED.2003.815862)

Roy, G., Brown, A. R., Asenov, A. and Roy, S. (2003) Bipolar quantum corrections in resolving individual dopants in 'atomistic' device simulation. Superlattices and Microstructures, 34(3-6), pp. 327-334. (doi:10.1016/j.spmi.2004.03.066)

Asenov, A., Kaya, S. and Brown, A.R. (2003) Intrinsic parameter fluctuations in decananometer MOSFETs introduced by gate line edge roughness. IEEE Transactions on Electron Devices, 50(5), pp. 1254-1260. (doi:10.1109/TED.2003.813457)

Asenov, A., Balasubramaniam, R., Brown, A.R. and Davies, J.H. (2003) RTS amplitudes in decananometer MOSFETs: 3-D simulation study. IEEE Transactions on Electron Devices, 50(3), pp. 839-845. (doi:10.1109/TED.2003.811418)

Alexander, C., Watling, J. and Asenov, A. (2003) Artificial carrier heating due to the introduction of ab-initio Coulomb scattering in Monte Carlo simulations. In: NPMS-6/SIMD-4 Sixth International Conference on New Phenomena in Mesoscopic Systems, and Fourth International Conference on Surfaces and Interfaces of Mesoscopic Devices, Maui, Hawaii, Maui, Hawaii,

Alexander, C., Watling, J. and Asenov, A. (2003) Mobility variations in ultra-small devices due to discrete device simulation. In: International Workshop on Computational Electronics - IWCE 9, Rome, Italy,

Alexander, C., Watling, J. and Asenov, A. (2003) Small volume mobility variations due to ionised impurity scattering. In: 13th International Conference on Nonequilibrium Carrier Dynamics - HCIS 13, Modena, Italy,

Alexander, C., Watling, J., Brown, A. and Asenov, A. (2003) Artificial carrier heating due to the introduction of ab initio Coulomb scattering in Monte Carlo simulations. Superlattices and Microstructures, 34, pp. 319-326. (doi:10.1016/j.spmi.2004.03.025)

Asenov, A. (2003) Brownian approach to simulation of ionic solutions and ion permeation through protein channels. In: IVth International Association for Mathematics and Computers in Simulation - IMACS Seminar on Monte Carlo Methods, Berlin, Germany,

Asenov, A. (2003) Modeling end-of-the roadmap transistors. In: 203rd Electrochemical Society (ECS) Meeting, Paris, France, abstract n.

Asenov, A., Brown, A.R. and Watling, J.R. (2003) Quantum corrections in the simulation of decanano MOSFETs. Solid-State Electronics, 47, pp. 1141-1145. (doi:10.1016/S0038-1101(03)00030-3)

Brown, A., Adamu-Lema, F. and Asenov, A. (2003) Intrinsic parameter fluctuations in UTB MOSFETs induced by body thickness variations. In: Proceeding Silicon Nanoelectronics Workshop 2003, Kyoto, Japan,

Brown, A., Adamu-Lema, F. and Asenov, A. (2003) Intrinsic parameter fluctuations in nanometer scale thin body SOI devices introduced by interface roughness. In: NPMS-6/SIMD-4 Sixth International Conference on New Phenomena in Mesoscopic Systems, and Fourth International Conference on Surfaces and Interfaces of Mesoscopic Devices, Maui, Hawaii, Maui, Hawaii, pp. 32-33.

Brown, A., Adamu-Lema, F. and Asenov, A. (2003) Intrinsic parameter fluctuations in nanometre scale thin-body SOI devices introduced by interface roughness. Superlattices and Microstructures, 34, pp. 283-291. (doi:10.1016/j.spmi.2004.03.026)

Cheng, B., Roy, S., Roy, G. and Asenov, A. (2003) Integrating 'atomistic' intrinsic parameter fluctuations into compact model circuit analysis. In: ESSDERC 2003 - European Solid-State Device Research Conference, Estoril, Portugal, pp. 437-440.

Cheng, B.J., Roy, S., Roy, G. and Asenov, A. (2003) Integrating 'atomistic', intrinsic parameter fluctuations into compact model circuit analysis. In: 33rd Conference on European Solid-State Device Research. ESSDERC '03, Estoril, Portugal, 16-18 Sep 2003, pp. 437-440. ISBN 0780379993 (doi:10.1109/ESSDERC.2003.1256907)

Garcia-Lourelo, A., Kalna, K., Asenov, A., Wilkins, R. and Lopez-Gonzalez, J. (2003) Statistic 3D simulation of intrinsic fluctuations in nanoscaled PHEMTs. In: 14th Workshop on Modeling and Simulation of Electron Devices, Barcelona, Spain, pp. 45-48.

Kalna, K. and Asenov, A. (2003) Nonequilibrium and ballistic transport, and backscattering in decanano HEMTs: a Monte Carlo simulation study. Mathematics and Computers in Simulation, 62, pp. 357-366.

Kalna, K., Borici, M., Yang, L. and Asenov, A. (2003) Monte Carlo simulation of III-V MOSFETs. In: 13th International Conference on Nonequilibrium Carrier Dynamics - HCIS 13, Modena, Italy,

Kalna, K., Yang, L. and Asenov, A. (2003) Simulation study of high performance III-V MOSFETs for digital applications. Journal of Computational Electronics, 2(2-4), pp. 341-345. (doi:10.1023/B:JCEL.0000011449.09021.55)

Kaya, S., Ma, W. and Asenov, A. (2003) Design of DG-MOSFETs for High Linearity Performance. In: EDMO 2003 - Electron Devices for Microwave and Optoelectronic Applications, Florida, USA,

Kaya, S., Ma, W. and Asenov, A. (2003) Design of DG-MOSFETs for high linearity performance. In: 2003 IEEE International SOI Conference,, Athens, Ohio, USA, pp. 68-69.

Kaya, S., Ma, W. and Asenov, A. (2003) Design of DG-MOSFET's for high linearity performance. In: IEEE International SOI Conference, Newport Beach, California, 29 September - 2 October 2003, pp. 68-69. ISBN 0780378156

Lee, A., Brown, A., Asenov, A. and Roy, S. (2003) RTS noise simulations of decanano MOSFETs subject to atomic scale structure variations. In: NPMS-6/SIMD-4 Sixth International Conference on New Phenomena in Mesoscopic Systems, and Fourth International Conference on Surfaces and Interfaces of Mesoscopic Devices, Maui, Hawaii, Maui, Hawaii,

Lee, A., Brown, A., Asenov, A. and Roy, S. (2003) Random telegraph signal noise simulation of decanano MOSFETs subject to atomic scale structure variation. Superlattices and Microstructures, 34, pp. 293-300. (doi:10.1016/j.spmi.2004.03.027)

Millar, C., Asenov, A. and Roy, S. (2003) Brownian dynamics based particle mesh simulation of ionic solutions and channels. In: Proceedings Modeling and Simulation of Microsystems 2003 - MSM 03, San Francisco, USA,

Moran, D., Kalna, K., Elgaid, K., McEwan, F., McLelland, H., Zhuang, L., Thayne, I., Stanley, C. and Asenov, A. (2003) Self-aligned 0.12micron T-gate InGaAs/InAlAs HEMT technology utilizing a non-annealed contact strategy. In: ESSDERC 2003 - European Solid-State Device Research Conference, Estoril, Portugal, pp. 315-318.

Moran, D. A. J., Kalna, K., Boyd, E., McEwan, F., McLelland, H., Zhuang, L. L., Stanley, C. R., Asenov, A. and Thayne, I. (2003) Self-aligned 0.12mm T-gate In.53Ga.47As/In.52Al.48As HEMT Technology Utilising a Non Annealed Ohmic Contact Strategy. In: ESSDERC '03 : 33rd Conference on European Solid-State Device Research, Estoril, Portugal, 16-18 September 2003, pp. 315-318. ISBN 0780379993 (doi:10.1109/ESSDERC.2003.1256877)

Roy, G., Brown, A., Asenov, A. and Roy, S. (2003) Bipolar quantum corrections in resolving individual dopants in atomistic, intrinsic parameter fluctuations into compact model circuit analysis. In: NPMS-6/SIMD-4 Sixth International Conference on New Phenomena in Mesoscopic Systems, and Fourth International Conference on Surfaces and Interfaces of Mesoscopic Devices, Maui, Hawaii, Maui, Hawaii, pp. 34-35.

Roy, G., Brown, A., Asenov, A. and Roy, S. (2003) Quantum aspects of resolving discrete charges in atomistic device simulation. In: International Workshop on Computational Electronics - IWCE 9, Rome, Italy,

Roy, S., Cheng, B., Roy, G. and Asenov, A. (2003) A methodology for introducing atomistic parameter fluctutations into compact device models for circuit simulation. In: International Workshop on Computational Electronics - IWCE 9, Rome, Italy,

Watling, J., Asenov, A., Brown, A., Svizhenko, A. and Anantram, M. (2003) Direct source-to-drain tunneling and its impact on intrinsic parameter fluctuations in nanometre scale double gate MOSFETs. In: Proceedings Modeling and Simulation of Microsystems 2003 - MSM 03, San Francisco, USA,

Yang, L., Asenov, A., Watling, J., Borici, M., Barker, J., Roy, S., Elgaid, K., Thayne, I. and Hackbarth, T. (2003) Optimisation of sub 11nm Si/SiGe MODFETs for high linearity applications. In: 14th Workshop on Modeling and Simulation of Electron Devices, Barcelona, Spain, pp. 41-44.

Yang, L., Asenov, A., Watling, J., Borici, M., Barker, J., Roy, S., Elgaid, K., Thayne, I. and Hackbarth, T. (2003) Optimisation of sub 11nm Si/SiGe MODFETs for high linearity applications. In: IEEE Conference on Electron devices and solid state circuits, Hong Kong, pp. 331-344.

Yang, L., Watling, J., Borici, M., Wilkins, R., Asenov, A., Barker, J. and Roy, S. (2003) Simulation of scaled sub-100nm strained Si p-channel MOSFETs. In: International Workshop on Computational Electronics - IWCE 9, Rome, Italy,

Yang, L., Asenov, A., Borici, M., Watling, J. R., Barker, J. R., Roy, S., Elgaid, K., Thayne, I. and Hackbarth, T. (2003) Optimizations of sub-100 nm Si/SiGe MODFETs for high linearity RF applications. In: IEEE Conference on Electron Devices and Solid-State Circuits, Kowloon, Hong Kong, 16-18 December 2003, pp. 331-334. ISBN 0780377494 (doi:10.1109/EDSSC.2003.1283543)

2002

Brown, A.R., Asenov, A. and Watling, J.R. (2002) Intrinsic fluctuations in sub 10-nm double-gate MOSFETs introduced by discreteness of charge and matter. IEEE Transactions on Nanotechnology, 1(4), pp. 195-200. (doi:10.1109/TNANO.2002.807392)

Kaya, S., Asenov, A. and Roy, S. (2002) Breakdown of universal mobility curves in sub-100-nm MOSFETs. IEEE Transactions on Nanotechnology, 1(4), pp. 260-264. (doi:10.1109/TNANO.2002.807385)

Millar, C., Asenov, A. and Watling, J.R. (2002) Excessive over-relaxation method for multigrid poisson solvers. Journal of Computational Electronics, 1(3), pp. 341-345. (doi:10.1023/A:1020791306305)

Asenov, A., Kaya, S. and Brown, A.R. (2002) Implications of imperfect interfaces and edges in ultra-small MOSFET characteristics. Physica Status Solidi B: Basic Solid State Physics, 233(1), pp. 101-112. (doi:10.1002/1521-3951(200209)233:1<101::AID-PSSB101>3.0.CO;2-M)

Brown, A.R., Watling, J.R. and Asenov, A. (2002) A 3-D atomistic study of archetypal double gate MOSFET structures. Journal of Computational Electronics, 1(1-2), pp. 165-169. (doi:10.1023/A:1020704919992)

Asenov, A., Kaya, S. and Davies, J. H. (2002) Intrinsic threshold voltage fluctuations in decanano MOSFETs due to local oxide thickness variations. IEEE Transactions on Electron Devices, 49(1), pp. 112-119. (doi:10.1109/16.974757)

Asenov, A. (2002) Simulation of intrinsic fluctuations in decanano PHEMTs: Present status and future challenges. In: Proceedings of Solid State Devices and Materials 2002, Nagoya, Japan, pp. 18-19.

Asenov, A., Watling, J. and Brown, A. (2002) The use of quantum potentials for confinement and tunneling in semiconductor devices. In: Modeling and simulation of microsystems ( 5th International conference), San Juan, Puerto Rico,

Asenov, A., Jaraiz, M., Roy, S., Roy, G. and Adamu-Lema, F. (2002) Integrated atomistic process and device simulation of decananometre MOSFETs. In: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2002), Kobe, Japan, 4-6 Sep 2002, pp. 87-90. ISBN 4891140275 (doi:10.1109/SISPAD.2002.1034523)

Brown, A., Asenov, A. and Watling, J. (2002) Intrinsic fluctuations in sub 10nm double-gate MOSFETs Introduced by discreteness of charge and matter. In: Proceedings Silicon Nanoelectronics Workshop 2002, Honolulu,

Kalna, K. and Asenov, A. (2002) Ballistic transport in decanano MOSFETs : Present status and future challenges. In: Proceesings of Workshop on Physical Simulation of Semiconductor Devices -13, Ilkley, UK, pp. 1-5.

Kalna, K. and Asenov, A. (2002) Breakdown mechanisms limiting the operation of double doped PHEMTs scaled into sub-100nm dimensions. In: Proceedings 4th International Conference on Advanced Semiconductor Devices and Microsystems (ASDAM 2002 ), Smolenice, Slovakia, pp. 141-144.

Kalna, K. and Asenov, A. (2002) Gate tunnelling and impact ionization in sub 100nm PHEMTs. In: Proceedings of Simulation of Semiconductor Processes and Devices 2002, Kobe, Japan, pp. 139-143.

Kalna, K. and Asenov, A. (2002) Monte Carlo modelling of first order quantum effects in deep submicron HEMTs. In: Neumann Institute for Computing winter school on Quantum simulations of complex many-body systems, Kerkrade, The Netherlands,

Kalna, K. and Asenov, A. (2002) Nonequilibrium transport in scaled high electron mobility transistors. Semiconductor Science and Technology, 17, pp. 579-584.

Kalna, K. and Asenov, A. (2002) Tunneling and impact ionization in scaled double doped PHEMTs. In: Proceedings of 32nd European Solid State Device Research Conference, pp. 303-306.

Kalna, K., Yang, L. and Asenov, A. (2002) High performance III-V MOSFETs : a dream close to reality? In: 10th International Symposium on Electron Devices for Microwave and Optoelectronic Devices, Manchester, UK, pp. 243-248.

Kalna, K. and Asenov, A. (2002) Breakdown mechanisms limiting the operation of double doped PHEMTs scaled into sub-100 nm dimensions. In: The Fourth International Conference on Advanced Semiconductor Devices and Microsystems., Smolenice Castle, Slovakia, 14-16 Octber 2002, pp. 141-144. ISBN 078037276X

Kalna, K. and Asenov, A. (2002) Gate tunnelling and impact ionisation in sub 100 nm PHEMTs. In: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2002), Kobe, Japan, 4-6 September 2002, pp. 139-142. ISBN 4891140275 (doi:10.1109/SISPAD.2002.1034536)

Kalna, K. and Asenov, A. (2002) Tunnelling and impact ionization in scaled double doped PHEMTs. In: 32nd European Solid-State Device Research Conference, Firenze, Italy, 24-26 September 2002, pp. 303-306. ISBN 8890084782

Kalna, K., Roy, S., Asenov, A., Elgaid, K. and Thayne, I. (2002) Scaling of pseudomorphic high electron mobility transistors to decanano dimensions. Solid-State Electronics, 46, pp. 631-638.

Kalna, K., Yang, L. and Asenov, A. (2002) High performance III-V MOSFETs: a dream close to reality? In: 10th IEEE International Symposium on Electron Devices for Microwave and Optoelectronic Applications., Manchester, UK, 18-19 November 2002, pp. 243-248. ISBN 0780375300

Kaya, S., Asenov, A. and Roy, S. (2002) Breakdown of universal mobility curves in sub-100nm MOSFETs. In: Proceedings Silicon Nanoelectronics Workshop 2002, Honolulu,

Prest, M.J. et al. (2002) Transconductance, carrier mobility and 1/f noise in Si/Si0.64Ge0.36/Si pMOSFETs. Materials Science and Engineering B: Solid-State Materials for Advanced Technology, 89, pp. 444-448.

Slavcheva, G., Davies, J. , Brown, A. and Asenov, A. (2002) Potential fluctuations in metal-oxide-semiconductor field-effect transistors generated by random impurities in the depletion layer. Journal of Applied Physics, 91, pp. 4326-4334. (doi:10.1063/1.1450031)

Slavcheva, G., Davies, J. , Brown, A. and Asenov, A. (2002) Statistics of the random potential fluctuations in the MOSFET channel. In: 26th International Conference on Physics of Semiconductors, Edinburgh, UK,

Unlu, H. and Asenov, A. (2002) Band offsets in III-nitride heterostructures. Journal of Physics D: Applied Physics, 35, pp. 591-594.

Watling, J.R., Brown, A.R., Asenov, A., Svizhenko, A. and Anantram, M.P. (2002) Simulation of direct source-to-drain tunnelling using the density gradient formalism: Non-Equilibrium Greens Function calibration. In: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2002), Kobe, Japan, 4-6 September 2002, pp. 267-270. ISBN 4891140275 (doi:10.1109/SISPAD.2002.1034569)

Watling, J., Brown, A., Asenov, A., Svizhenko, A. and Anatram, M. (2002) Simulation of direct source-to -drain tunneling using density gradient formalism: Non-equlibrium Green's function calibration. In: Proceedings of Simulation of Semiconductor Processes and Devices 2002, Kobe, Japan, pp. 267-270.

Yang, L., Watling, J., Wilkins, R., Asenov, A., Barker, J., Roy, S. and Hackbarth, T. (2002) Scaling study of Si/SiGe MOSFETs for RF applications. In: 10th International Symposium on Electron Devices for Microwave and Optoelectronic Devices ( EDMO 2002), Manchester, UK, pp. 101-106.

Yang, L., Watling, J.R., Wilkins, R.C.W., Asenov, A., Barker, J.R., Roy, S. and Hackbarth, T. (2002) Scaling study of Si/SiGe MODFETs for RF applications. In: 10th IEEE International Symposium on Electron Devices for Microwave and Optoelectronic Applications (EDMO), Manchester, UK, 18-19 November 2002, pp. 101-106. ISBN 0780375300

2001

Asenov, A., Slavcheva, G., Brown, A.R. and Saini, S. (2001) Increase in the random dopant induced threshold fluctuations and lowering in sub-100 nm MOSFETs due to quantum effects: a 3-D density-gradient simulation study. IEEE Transactions on Electron Devices, 48(4), pp. 722-729. (doi:10.1109/16.915703)

Asenov, A. (2001) 3D statistical simulation of intrinsic fluctuations in decanano MOSFETS induced by discrete dopants, oxide thickness fluctuations and LER. In: Simulation of Semiconductor Processes and Devices, Vienna, pp. 162-169.

Asenov, A., Slavcheva, G., Kaya, S. and Balasubramaniam, R. (2001) Quantum corrections to the 'atomistic' MOSFET simulations. VLSI Design, 13, 15-+.

Brown, A., Kaya, S., Asenov, A., Davies, J. and Linton, T. (2001) Statistical 3D simulation of line edge roughness in decanano MOSFETs. In: Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 10-11.

Kalna, K. and Asenov, A. (2001) Quantum corrections in Monte Carlo simulations of scaled pHEMTs with multiple delta doping. In: IWCE-8, Illinois, USA,

Kalna, K. and Asenov, A. (2001) Multiple delta doping in aggressively scaled PHEMTs. In: Solid-State Device Research Conference, Nuremburg, Germany, 11-13 September 2001, pp. 319-322. ISBN 2914601010

Kalna, K., Asenov, A., Elgaid, K. and Thayne, I. (2001) Scaling of pHEMTs to decanano dimensions. VLSI Design, 13, pp. 435-439.

Kaya, S., Asenov, A. and Roy, S. (2001) Breakdown of Universal Mobility Curves in sub-100nm MOSFETs. In: IWCE-8, Illinois, USA,

Kaya, S., Brown, A., Asenov, A., Margot, D. and Linton, T. (2001) Analysis of statistical fluctuations due to line edge roughness in sub-0.1mm MOSFETs. In: Simulation of Semiconductor Processes and Devices 2001, pp. 78-81.

Knox, A.R., Asenov, A. and Lowe, A.C. (2001) An electron emission model for use with 3D electromagnetic finite element simulation. Solid-State Electronics, 45, pp. 841-851.

Palmer, M.J. et al. (2001) Enhanced velocity overshoot and transconductance in Si/Si(0.64)Ge(0.36)/Si pMOSFETs - predictions for deep submicron devices. In: Solid State Device Research Conference, Nuremburg, Germany, 11-13 September 2001, pp. 199-202. ISBN 2914601010

Palmer, M. et al. (2001) Effective mobilities in pseudomorphic Si/SiGe/Si p-channel metal-oxide-semiconductor field-effect transistors with thin silicon capping layers. Applied Physics Letters, 78, pp. 1424-1426.

Palmer, M. et al. (2001) Enhanced velocity overshoot and transconductance in Si/SiGe/Si pMOSFETs - predictions for deep submicron devices. In: Proceeding ESSDERC 2001 - Edition Frontiers, Nuremberg, Germany, pp. 199-202.

Straube, U.N., Evans, A.G.R., Braithwaite, G., Kaya, S., Watling, J. and Asenov, A. (2001) On the mobility extraction for HMOSFETs. Solid-State Electronics, 45, pp. 527-529.

Watling, J.R., Zhao, Y.P., Asenov, A. and Barker, J.R. (2001) Non-equilibrium hole transport in deep sub-micron well-tempered Si p-MOSFETs. VLSI Design, 13, pp. 169-173.

Watling, J., Brown, A., Asenov, A. and Ferry, D. (2001) Quantum corrections in 3-D drift diffusion simulation of decanano MOSFETs using an effective potential. In: Simulation of semiconductor processes and devices, Vienna, pp. 81-85.

2000

Asenov, A. and Saini, S. (2000) Polysilicon gate enhancement of the random dopant induced threshold voltage fluctuations in sub-100 nm MOSFETs with ultrathin gate oxide. IEEE Transactions on Electron Devices, 47(4), pp. 805-812. (doi:10.1109/16.830997)

Asenov, A. (2000) Quantum corrections to the `atomistic' MOSFET simulation. In: 7th International Workshop on Computational Electronics, Glasgow, UK, 22-25 May 2000, pp. 10-11. ISBN 0852617046 (doi:10.1109/IWCE.2000.869895)

Asenov, A., Balasubramaniam, R., Brown, A.R., Davies, J.H. and Saini, S. (2000) Random telegraph signal amplitudes in sub 100 nm (decanano) MOSFETs: a 3D `Atomistic' simulation study. In: International Electron Devices Meeting, San Francisco, California, 10-13 December 2000, pp. 279-282. ISBN 0780364384 (doi:10.1109/IEDM.2000.904311)

Asenov, A. and Kalna, K. (2000) Effect of oxide interface roughness on the threshold voltage fluctuations in decanano MOSFETs with ultrathin gate oxides. In: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2000), Seattle, Washington, 6-8 September 2000, pp. 135-138. ISBN 0780362799 (doi:10.1109/SISPAD.2000.871226)

Kalna, K., Asenov, A., Elgaid, K. and Thayne, I. (2000) Effect of impact ionization in scaled pHEMTs. In: 8th IEEE International Symposium on High Performance Electron Devices for Microwave and Optoelectronic Applications., Glasgow, UK, 13-14 November 2000, pp. 236-241. ISBN 078036550X

Kalna, K., Asenov, A., Elgaid, K. and Thayne, I. (2000) Performance of aggressively scaled pseudomorphic HEMTs: a monte carlo simulation study. In: Third International EuroConference on Advanced Semiconductor Devices and Microsystems., Smolenice Castle, Slovakia, 16-18 October 2000, pp. 55-58. ISBN 0780359399

Kalna, K., Roy, S., Asenov, A., Elgaid, K. and Thayne, I. (2000) RF analysis of aggressively scaled pHEMTs. In: 30th European Solid-State Device Research Conference., Cork, Ireland, 11-13 September 2000, pp. 156-159. ISBN 2863322486

Watling, J.R., Barker, J.R. and Asenov, A. (2000) Soft sphere model for electron correlation and scattering in the atomistic modelling of semiconductor devices. In: International Workshop on Computational Electronics, Glasgow, UK, 22-25 May 2000, pp. 159-160. ISBN 0852617046 (doi:10.1109/IWCE.2000.869974)

Watling, J.R., Zhao, Y.P., Asenov, A. and Barker, J.R. (2000) Nonequilibrium hole transport in deep sub-micron well-tempered Si p-MOSFETs. In: 7th International Workshop on Computational Electronics, Glasgow, UK, 22-25 May 2000, pp. 66-67. ISBN 0852617046 (doi:10.1109/IWCE.2000.869925)

Zhao, Y.P. et al. (2000) Indication of Non-equilibrium Transport in SiGe p-MOSFETs. In: 30th European Solid-State Device Research Conference, Cork, Ireland, 11-13 September 2000, pp. 224-227. ISBN 2863322486

1999

Asenov, A., Brown, A. R., Davies, J. H. and Saini, S. (1999) Hierarchical approach to 'atomistic' 3-D MOSFET simulation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 18(11), pp. 1558-1565. (doi:10.1109/43.806802)

Asenov, A. and Saini, S. (1999) Suppression of random dopant-induced threshold voltage fluctuations in sub-0.1-μm MOSFET's with epitaxial and delta-doped channels. IEEE Transactions on Electron Devices, 46(8), pp. 1718-1724. (doi:10.1109/16.777162)

Ternent, G., Asenov, A., Thayne, I.G., MacIntyre, D.S., Thom, S. and Wilkinson, C.D.W. (1999) SiGe p-channel MOSFETs with tungsten gate. Electronics Letters, 35(5), pp. 430-431. (doi:10.1049/el:19990305)

Asenov, A., Slavcheva, G., Brown, A.R., Davies, J.H. and Saini, S. (1999) Quantum mechanical enhancement of the random dopant induced threshold voltage fluctuations and lowering in sub 0.1 micron MOSFETs. In: International Electron Devices Meeting, Washington, DC, 5-8 December 1999, pp. 535-538. ISBN 0780354109 (doi:10.1109/IEDM.1999.824210)

Roy, S., Kaya, S., Asenov, A. and Barker, J.R. (1999) RF analysis methodology for Si and SiGe FETs based on transient Monte Carlo simulation. In: International Conference on Simulation of Semiconductor Processes and Devices., Kyoto, Japan, 6-8 September 1999, pp. 147-150. ISBN 4930813980 (doi:10.1109/SISPAD.1999.799282)

1998

Asenov, A. (1998) Random dopant induced threshold voltage lowering and fluctuations in sub-0.1 μm MOSFET's: A 3-D 'atomistic' simulation study. IEEE Transactions on Electron Devices, 45(12), pp. 2502-2513. (doi:10.1109/16.735728)

Babiker, S., Asenov, A., Cameron, N., Beaumont, S. P. and Barker, J. R. (1998) Complete Monte Carlo RF analysis of 'real' short-channel compound FET's. IEEE Transactions on Electron Devices, 45(8), pp. 1644-1652. (doi:10.1109/16.704358)

Asenov, A. (1998) Efficient 3D `atomistic' simulation technique for studying of random dopant induced threshold voltage lowering and fluctuations in decanano MOSFETs. In: International Workshop on Computational Electronics, Osaka, Japan, 19-21 October 1998, pp. 263-266. ISBN 0780343697 (doi:10.1109/IWCE.1998.742761)

Asenov, A. (1998) Random dopant threshold voltage fluctuations in 50 nm epitaxial channel MOSFETs: a 3D 'atomistic' simulation study. In: ESSDERC '98 : 28rd Conference on European Solid-State Devices, Bordeaux, France, 8-10 September 1998, pp. 300-303. ISBN 2863322346

Asenov, A., Brown, A.R. and Roy, S. (1998) Parallel semiconductor device simulation: from power to 'atomistic' devices. In: International Workshop on Computational Electronics, Osaka, Japan, 19-21 October 1998, pp. 58-61. ISBN 0780343697 (doi:10.1109/IWCE.1998.742707)

Babiker, S., Asenov, A., Roy, S., Barker, J.R. and Beaumont, S.P. (1998) Strain engineered InxGa1-xAs channel pHEMTs on virtual substrates: a simulation study. In: International Workshop on Computational Electronics, Osaka, Japan, 19-21 October 1998, pp. 178-181. ISBN 0780343697 (doi:10.1109/IWCE.1998.742741)

Roy, S., Kaya, S., Babiker, S., Asenov, A. and Barker, J.R. (1998) Monte Carlo investigation of optimal device architectures for SiGe FETs. In: International Workshop on Computational Electronics, Osaka, Japan, 19-21 October 1998, pp. 210-213. ISBN 0780343697 (doi:10.1109/IWCE.1998.742749)

Watling, J.R., Asenov, A. and Barker, J.R. (1998) Efficient hole transport model in warped bands for use in the simulation of Si/SiGe MOSFETs. In: International Workshop on Computational Electronics, Osaka, Japan, 19-21 October 1998, pp. 96-99. ISBN 0780343697 (doi:10.1109/IWCE.1998.742719)

1997

Borsosfoldi, Z., Webster, D.R., Thayne, I.G., Asenov, A., Haigh, D.G. and Beaumont, S.P. (1997) Ultra-linear pseudomorphic HEMTs for wireless communications: A simulation study. In: IEEE International Symposium on Compound Semiconductors, San Diego, California, 8-11 September 1997, pp. 475-478. ISBN 0750305568 (doi:10.1109/ISCS.1998.711718)

Roy, S., Asenov, A., Babiker, S., Barker, J.R. and Beaumont, S.P. (1997) RF performance of strained Si MODFETs and MOSFETs on "virtual" SiGe substrates: A Monte Carlo study. In: European Solid-State Device Research Conference, Stuttgart, Germany, 22-24 September 1997, pp. 192-195. ISBN 2863322214

1996

Babiker, S., Asenov, A., Cameron, N. and Beaumont, S.P. (1996) Simple approach to include external resistances in the Monte Carlo simulation of MESFETs and HEMTs. IEEE Transactions on Electron Devices, 43(11), pp. 2032-2034. (doi:10.1109/16.543047)

Cameron, N.I., Murad, S., McLelland, H., Asenov, A., Taylor, M.R.S., Holland, M.C. and Beaumont, S.P. (1996) Gate recess engineering of pseudomorphic In0.30GaAs/GaAs HEMTs. Electronics Letters, 32(8), pp. 770-772.

1995

Speckbacher, P., Berger, J., Asenov, A., Koch, D. and Weber, W. (1995) The 'gated-diode' configuration in MOSFET's, a sensitive tool for characterizing hot-carrier degradation. IEEE Transactions on Electron Devices, 42(7), pp. 1287-1296. (doi:10.1109/16.391211)

1992

Marczewski, J., Zachau, M., Asenov, A., Koch, F. and Gruetzmacher, D. (1992) A diode device combining lateral field-effect transport and vertical tunneling in a multi-quantum-well heterostructure. IEEE Electron Device Letters, 13(6), pp. 338-340. (doi:10.1109/55.145077)

1990

Speckbacher, P., Asenov, A., Bollu, M., Koch, F. and Weber, W. (1990) Hot-carrier-induced deep-level defects from gated-diode measurements on MOSFETs. IEEE Electron Device Letters, 11(2), pp. 95-97. (doi:10.1109/55.46940)

This list was generated on Sun Oct 22 16:08:27 2017 BST.
Number of items: 524.

Articles

Al-Ameri, T., Georgiev, V.P. , Adamu-Lema, F. and Asenov, A. (2017) Simulation study of vertically stacked lateral Si nanowires transistors for 5 nm CMOS applications. IEEE Journal of the Electron Devices Society, (doi:10.1109/JEDS.2017.2752465) (Early Online Publication)

Georgiev, V. P. , Mirza, M. M., Dochioiu, A.-I., Lema, F.-A., Amoroso, S. M., Towie, E., Riddet, C., MacLaren, D. A., Asenov, A. and Paul, D. J. (2017) Experimental and simulation study of 1D silicon nanowire transistors using heavily doped channels. IEEE Transactions on Nanotechnology, 16(5), pp. 727-735. (doi:10.1109/TNANO.2017.2665691)

Thirunavukkarasu, V. et al. (2017) Investigation of inversion, accumulation and junctionless mode bulk Germanium FinFETs. Superlattices and Microstructures, (doi:10.1016/j.spmi.2017.07.020) (In Press)

Duan, M. , Zhang, J. F., Ji, Z., Zhang, W. D., Kaczer, B. and Asenov, A. (2017) Key issues and solutions for characterizing hot carrier aging of nanometer scale nMOSFETs. IEEE Transactions on Electron Devices, 64(6), pp. 2478-2484. (doi:10.1109/TED.2017.2691008)

Al-Ameri, T., Georgiev, V. P. , Sadi, T., Wang, Y., Adamu-Lema, F., Wang, X., Amoroso, S. M., Towie, E., Brown, A. and Asenov, A. (2017) Impact of quantum confinement on transport and the electrostatic driven performance of silicon nanowire transistors at the scaling limit. Solid-State Electronics, 129, pp. 73-80. (doi:10.1016/j.sse.2016.12.015)

Todri-Sanial, A. et al. (2017) A survey of carbon nanotube interconnects for energy efficient integrated circuits. IEEE Circuits and Systems Magazine, 17(2), pp. 47-62. (doi:10.1109/MCAS.2017.2689538)

Duan, M. , Zhang, J. F., Ji, Z., Zhang, W. D., Vigar, D., Asenov, A., Gerrer, L., Chandra, V., Aitken, R. and Kaczer, B. (2016) Insight into electron traps and their energy distribution under positive bias temperature stress and hot carrier aging. IEEE Transactions on Electron Devices, 63(9), pp. 3642-3648. (doi:10.1109/TED.2016.2590946)

Jiang, X., Guo, S., Wang, R., Wang, X., Cheng, B., Asenov, A. and Huang, R. (2016) A device-level characterization approach to quantify the impacts of different random variation sources in FinFET technology. IEEE Electron Device Letters, 37(8), pp. 962-965. (doi:10.1109/LED.2016.2581878)

Ding, J., Reid, D., Asenov, P., Millar, C. and Asenov, A. (2015) Influence of transistors with BTI-induced aging on SRAM write performance. IEEE Transactions on Electron Devices, 62(10), pp. 3133-3138. (doi:10.1109/TED.2015.2462319)

Wang, X., Cheng, B., Reid, D., Pender, A., Asenov, P., Millar, C. and Asenov, A. (2015) FinFET centric variability-aware compact model extraction and generation technology supporting DTCO. IEEE Transactions on Electron Devices, 62(10), pp. 3139-3146. (doi:10.1109/TED.2015.2463073)

Wang, Y. et al. (2015) Simulation study of the impact of quantum confinement on the electrostatically driven oerformance of n-type nanowire transistors. IEEE Transactions on Electron Devices, 62(10), pp. 3229-3236. (doi:10.1109/TED.2015.2470235)

Gerrer, L., Georgiev, V., Amoroso, S.M., Towie, E. and Asenov, A. (2015) Comparison of Si <100> and <110> crystal orientation nanowire transistor reliability using Poisson–Schrödinger and classical simulations. Microelectronics Reliability, 55(9-10), pp. 1307-1312. (doi:10.1016/j.microrel.2015.06.094)

Wang, L., Brown, A. R., Nedjalkov, M., Alexander, C., Cheng, B., Millar, C. and Asenov, A. (2015) Impact of self-heating on the statistical variability in bulk and SOI FinFETs. IEEE Transactions on Electron Devices, 62(7), pp. 2106-2112. (doi:10.1109/TED.2015.2436351)

Amoroso, S. M., Adamu-Lema, F., Brown, A. R. and Asenov, A. (2015) A mobility correction approach for overcoming artifacts in atomistic drift-diffusion simulation of nano-MOSFETs. IEEE Transactions on Electron Devices, 62(6), pp. 2056-2060. (doi:10.1109/TED.2015.2419815)

Asenov, A., Cheng, B., Wang, X., Brown, A. R., Millar, C., Alexander, C., Amoroso, S. M., Kuang, J. B. and Nassif, S. R. (2015) Variability aware simulation based design- technology cooptimization (DTCO) flow in 14 nm FinFET/SRAM cooptimization. IEEE Transactions on Electron Devices, 62(6), pp. 1682-1690. (doi:10.1109/TED.2014.2363117)

Jiang, X., Wang, J., Wang, X., Wang, R., Cheng, B., Asenov, A., Wei, L. and Huang, R. (2015) New assessment methodology based on energy–delay–yield cooptimization for nanoscale CMOS technology. IEEE Transactions on Electron Devices, 62(6), pp. 1746-1753. (doi:10.1109/TED.2015.2396575)

Georgiev, V. P., Amoroso, S. M., Ali, T. M., Vila-Nadal, L. , Busche, C., Cronin, L. and Asenov, A. (2015) Comparison between bulk and FDSOI POM flash cell: a multiscale simulation study. IEEE Transactions on Electron Devices, 62(2), pp. 680-684. (doi:10.1109/TED.2014.2378378)

Georgiev, V. and Asenov, A. (2015) Multi-scale computational framework for evaluating of the performance of molecular based flash cells. Lecture Notes in Computer Science, 8962, pp. 196-203. (doi:10.1007/978-3-319-15585-2_22)

Amoroso, S. M., Georgiev, V. P., Gerrer, L., Towie, E., Wang, X., Riddet, C., Brown, A. R. and Asenov, A. (2014) Inverse scaling trends for charge-trapping-induced degradation of FinFETs performance. IEEE Transactions on Electron Devices, 61(12), pp. 4014-4018. (doi:10.1109/TED.2014.2363212)

Busche, C. et al. (2014) Design and fabrication of memory devices based on nanoscale polyoxometalate clusters. Nature, 515(7528), pp. 545-549. (doi:10.1038/nature13951) (PMID:25409147)

Adamu-Lema, F., Wang, X., Amoroso, S. M., Riddet, C., Cheng, B., Shifren, L., Aitken, R., Sinha, S., Yeric, G. and Asenov, A. (2014) Performance and variability of doped multithreshold FinFETs for 10-nm CMOS. IEEE Transactions on Electron Devices, 61(10), pp. 3372-3378. (doi:10.1109/TED.2014.2346544)

Duan, M. , Zhang, J. F., Ji, Z., Zhang, W. D., Kaczer, B., Schram, T., Ritzenthaler, R., Groeseneken, G. and Asenov, A. (2014) Development of a technique for characterizing bias temperature instability-induced device-to-device variation at SRAM-relevant conditions. IEEE Transactions on Electron Devices, 61(9), pp. 3081-3089. (doi:10.1109/TED.2014.2335053)

Gerrer, L., Amoroso, S.M., Hussin, R. and Asenov, A. (2014) RTN distribution comparison for bulk, FDSOI and FinFETs devices. Microelectronics Reliability, 54(9-10), pp. 1749-1752. (doi:10.1016/j.microrel.2014.07.013)

Hussin, R., Amoroso, S. M., Gerrer, L., Kaczer, B., Weckx, P., Franco, J., Vanderheyden, A., Vanhaeren, D., Horiguchi, N. and Asenov, A. (2014) Interplay between statistical variability and reliability in contemporary pmosfets: measurements versus simulations. IEEE Transactions on Electron Devices, 61(9), pp. 3265-3273. (doi:10.1109/TED.2014.2336698)

Asenov, A., Adamu-Lema, F., Wang, X. and Amoroso, S. M. (2014) Problems with the continuous doping TCAD simulations of decananometer CMOS transistors. IEEE Transactions on Electron Devices, 61(8), pp. 2745-2751. (doi:10.1109/TED.2014.2332034)

Wang, X., Brown, A. R., Cheng, B., Roy, S. and Asenov, A. (2014) Drain bias effects on statistical variability and reliability and related subthreshold variability in 20-nm bulk planar MOSFETs. Solid-State Electronics, 98, pp. 99-105. (doi:10.1016/j.sse.2014.04.017)

Amoroso, S. M., Gerrer, L., Hussin, R., Adamu-Lema, F. and Asenov, A. (2014) Time-dependent 3-D statistical KMC simulation of reliability in nanoscale MOSFETs. IEEE Transactions on Electron Devices, 61(6), pp. 1956-1962. (doi:10.1109/TED.2014.2318172)

Georgiev, V. P., Markov, S., Vila-Nadal, L. , Busche, C., Cronin, L. and Asenov, A. (2014) Optimization and evaluation of variability in the programming window of a flash cell with molecular metal-oxide storage. IEEE Transactions on Electron Devices, 61(6), pp. 2019-2026. (doi:10.1109/TED.2014.2315520)

Amoroso, S. M., Gerrer, L., Nedjalkov, M., Hussin, R., Alexander, C. and Asenov, A. (2014) Modeling Carrier Mobility in Nano-MOSFETs in the Presence of Discrete Trapped Charges: Accuracy and Issues. IEEE Transactions on Electron Devices, 61(5), pp. 1292-1298. (doi:10.1109/TED.2014.2312820)

Gerrer, L., Ding, J., Amoroso, S.M., Adamu-Lema, F., Hussin, R., Reid, D., Millar, C. and Asenov, A. (2014) Modelling RTN and BTI in nanoscale MOSFETs from device to circuit: a review. Microelectronics Reliability, 54(4), pp. 682-697. (doi:10.1016/j.microrel.2014.01.024)

Sellier, J.M., Amoroso, S.M., Nedjalkov, M., Selberherr, S., Asenov, A. and Dimov, I. (2014) Electron dynamics in nanoscale transistors by means of Wigner and Boltzmann approaches. Physica A: Statistical Mechanics and its Applications, 398, pp. 194-198. (doi:10.1016/j.physa.2013.12.045)

Vilà-Nadal, L. , Mitchell, S. G., Markov, S., Busche, C., Georgiev, V., Asenov, A. and Cronin, L. (2013) Towards polyoxometalate-cluster-based nano-electronics. Chemistry: A European Journal, 19(49), pp. 16502-16511. (doi:10.1002/chem.201301631)

Wang, X., Cheng, B., Brown, A. R., Millar, C., Kuang, J. B., Nassif, S. and Asenov, A. (2013) Statistical variability and reliability and the impact on corresponding 6T-SRAM cell design for a 14-nm node SOI FinFET technology. IEEE Design and Test, 30(6), pp. 18-28. (doi:10.1109/MDAT.2013.2266395)

Gerrer, L., Amoroso, S. M., Markov, S., Adamu-Lema, F. and Asenov, A. (2013) 3-D statistical simulation comparison of oxide reliability of planar MOSFETs and FinFET. IEEE Transactions on Electron Devices, 60(12), pp. 4008-4013. (doi:10.1109/TED.2013.2285588)

Mohd Zain, A. S., Markov, S., Cheng, B. and Asenov, A. (2013) Comprehensive study of the statistical variability in a 22nm fully depleted ultra-thin-body SOI MOSFET. Solid-State Electronics, 90, pp. 51-55. (doi:10.1016/j.sse.2013.02.052)

Wang, L., Brown, A. R., Cheng, B. and Asenov, A. (2013) Analytical models for three-dimensional ion implantation profiles in FinFETs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 32(12), pp. 2004-2008. (doi:10.1109/TCAD.2013.2277975)

Duan, M. , Zhang, J., Ji, Z., Zhang, W.D., Kaczer, B., Schram, T., Ritzenthaler, R., Groeseneken, G. and Asenov, A. (2013) New analysis method for time-dependent device-to-device variation accounting for within-device fluctuation. IEEE Transactions on Electron Devices, 60(8), pp. 2505-2511. (doi:10.1109/TED.2013.2270893)

Wang, X., Cheng, B., Brown, A.R., Millar, C., Kuang, J.B., Nassif, S. and Asenov, A. (2013) Interplay between process-induced and statistical variability in 14-nm CMOS technology double-gate SOI FinFETs. IEEE Transactions on Electron Devices, 60(8), pp. 2485-2492. (doi:10.1109/TED.2013.2267745)

Amoroso, S.M., Compagnoni, C.M., Ghetti, A., Gerrer, L., Spinelli, A.S., Lacaita, A.L. and Asenov, A. (2013) Investigation of the RTN Distribution of nanoscale MOS devices from subthreshold to on-state. IEEE Electron Device Letters, 34(5), pp. 683-685. (doi:10.1109/LED.2013.2250477)

Wang, X., Adamu-Lema, F., Cheng, B. and Asenov, A. (2013) Geometry, temperature, and body bias dependence of statistical variability in 20-nm bulk CMOS technology: a comprehensive simulation analysis. IEEE Transactions on Electron Devices, 60(5), pp. 1547-1554. (doi:10.1109/TED.2013.2254490)

Georgiev, V.P., Towie, E.A. and Asenov, A. (2013) Impact of precisely positioned dopants on the performance of an ultimate silicon nanowire transistor: a full three-dimensional NEGF simulation study. IEEE Transactions on Electron Devices, 60(3), pp. 965-971. (doi:10.1109/TED.2013.2238944)

Bukhori, M.F., Kamsani, N.A., Asenov, A. and Nayan, N.A. (2012) Accurate capturing of the statistical aspect of NBTI/PBTI variability into statistical compact models. Microelectronics Journal, 43(11), pp. 793-801. (doi:10.1016/j.mejo.2012.07.004)

Simpson, R.N., Bordas, S.P.A., Asenov, A. and Brown, A. (2012) Enriched residual free bubbles for semiconductor device simulation. Computational Mechanics, 50(1), pp. 119-133. (doi:10.1007/s00466-011-0658-6)

Wang, X., Roy, G., Saxod, O., Bajolet, A., Juge, A. and Asenov, A. (2012) Simulation study of dominant statistical variability sources in 32-nm high-k/metal gate CMOS. IEEE Electron Device Letters, 33(5), pp. 643-645. (doi:10.1109/LED.2012.2188268)

Markov, S., Cheng, B. and Asenov, A. (2012) Statistical variability in fully depleted SOI MOSFETs due to random dopant fluctuations in the source and drain extensions. IEEE Electron Device Letters, 33(3), pp. 315-317. (doi:10.1109/LED.2011.2179114)

Martinez, A., Aldegunde, M., Brown, A., Roy, S. and Asenov, A. (2012) NEGF simulations of a junctionless Si gate-all-around nanowire transistor with discrete dopants. Solid-State Electronics, 71, pp. 101-105. (doi:10.1016/j.sse.2011.10.028)

Moore, I., Millar, C., Roy, S. and Asenov, A. (2012) FET based nano-pore sensing: a 3D simulation study. Journal of Computational Electronics, 11(3), pp. 266-271. (doi:10.1007/s10825-012-0405-z)

Riddet, C., Watling, J., Chan, K., Parker, E.H.C., Whall, T.E., Leadley, D.R. and Asenov, A. (2012) Hole mobility in germanium as a function of substrate and channel orientation, strain, doping, and temperature. IEEE Transactions on Electron Devices, 59(7), pp. 1878-1884. (doi:10.1109/TED.2012.2194498)

Roy, G., Ghetti, A., Benvenuti, A., Erlebach, A. and Asenov, A. (2011) Comparative simulation study of the different sources of statistical variability in contemporary floating-gate nonvolatile memory. IEEE Transactions on Electron Devices, 58(12), pp. 4155-4163. (doi:10.1109/TED.2011.2167511)

Aldegunde, M., Martinez, A. and Asenov, A. (2011) Non-equilibrium Green’s function analysis of cross section and channel length dependence of phonon scattering and its impact on the performance of Si nanowire field effect transistors. Journal of Applied Physics, 110(9), 094518. (doi:10.1063/1.3658856)

Benbakhti, B. et al. (2011) Numerical analysis of the new implant-free quantum-well CMOS: DualLogic approach. Solid-State Electronics, 63(1), pp. 14-18. (doi:10.1016/j.sse.2011.05.006)

Markov, S., Wang, X., Moezi, N. and Asenov, A. (2011) Drain current collapse in nanoscaled bulk MOSFETs due to random dopant compensation in the source/drain extensions. IEEE Transactions on Electron Devices, 58(8), pp. 2385-2393. (doi:10.1109/TED.2011.2152845)

Martinez, A., Aldegunde, M., Seoane, N., Brown, A.R., Barker, J.R. and Asenov, A. (2011) Quantum-transport study on the impact of channel length and cross sections on variability induced by random discrete dopants in narrow gate-all-around silicon nanowire transistors. IEEE Transactions on Electron Devices, 58(8), pp. 2209-2217. (doi:10.1109/TED.2011.2157929)

Wang, X., Brown, A.R., Idris, N., Markov, S., Roy, G. and Asenov, A. (2011) Statistical threshold-voltage variability in scaled decananometer bulk HKMG MOSFETs: a full-scale 3-D simulation scaling study. IEEE Transactions on Electron Devices, 58(8), pp. 2293-2301. (doi:10.1109/TED.2011.2149531)

Reid, D., Millar, C., Roy, S. and Asenov, A. (2011) Statistical enhancement of the evaluation of combined RDD- and LER-induced VT variability: lessons from 10⁵ sample simulations. IEEE Transactions on Electron Devices, 58(8), 2257 -2265. (doi:10.1109/TED.2011.2147317)

Cheng, B., Brown, A.R. and Asenov, A. (2011) Impact of NBTI/PBTI on SRAM stability degradation. IEEE Electron Device Letters, 32(6), pp. 740-742. (doi:10.1109/LED.2011.2136316)

Garcia-Loureiro, A.J., Seoane, N., Aldegunde, M., Valin, R., Asenov, A., Martinez, A. and Kalna, K. (2011) Implementation of the density gradient quantum corrections for 3-D simulations of multigate nanoscaled transistors. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 30(6), pp. 841-851. (doi:10.1109/TCAD.2011.2107990)

Chan, K.H., Benbakhti, B., Riddet, C., Watling, J. and Asenov, A. (2011) Simulation study of the 20nm gate-length implant-free quantum well p-MOSFET. Microelectronic Engineering, 88(4), pp. 362-365. (doi:10.1016/j.mee.2010.09.025)

Wang, X., Roy, S., Brown, A.R. and Asenov, A. (2011) Impact of STI on statistical variability and reliability of decananometer MOSFETs. IEEE Electron Device Letters, 32(4), pp. 479-481. (doi:10.1109/LED.2011.2108256)

Benbakhti, B., Kalna, K., Chan, K.H., Towie, E., Hellings, G., Eneman, G., De Meyer, K., Meuris, M. and Asenov, A. (2011) Design and analysis of the In0.53Ga0.47As implant-free quantum-well device structure. Microelectronic Engineering, 88(4), pp. 358-361. (doi:10.1016/j.mee.2010.11.019)

Watling, J.R., Riddet, C., Chan, K.H. and Asenov, A. (2011) Simulation of hole-mobility in doped relaxed and strained Ge. Microelectronic Engineering, 88(4), pp. 462-464. (doi:10.1016/j.mee.2010.11.017)

Riddet, C., Alexander, C., Brown, A., Roy, S. and Asenov, A. (2011) Simulation of "ab initio" quantum confinement scattering in UTB MOSFETs using three-dimensional ensemble Monte Carlo. IEEE Transactions on Electron Devices, 58(3), pp. 600-608. (doi:10.1109/TED.2010.2095422)

Markov, S., Roy, S. and Asenov, A. (2010) Direct tunnelling gate leakage variability in nano-CMOS transistors. IEEE Transactions on Electron Devices, 57(11), pp. 3106-3114. (doi:10.1109/TED.2010.2075932)

Reid, D., Millar, C., Roy, S. and Asenov, A. (2010) Understanding LER-induced MOSFET VT variability - part I: three-dimensional simulation of large statistical samples. IEEE Transactions on Electron Devices, 57(11), pp. 2801-2807. (doi:10.1109/TED.2010.2067731)

Reid, D., Millar, C., Roy, S. and Asenov, A. (2010) Understanding LER-induced MOSFET VT variability - part II: reconstructing the distribution. IEEE Transactions on Electron Devices, 57(11), pp. 2808-2813. (doi:10.1109/TED.2010.2067732)

Kovac, U., Alexander, C., Roy, G., Riddet, C., Cheng, B.J. and Asenov, A. (2010) Hierarchical Simulation of Statistical Variability: From 3-D MC With "ab initio" Ionized Impurity Scattering to Statistical Compact Models. IEEE Transactions on Electron Devices, 57(10), pp. 2418-2426. (doi:10.1109/TED.2010.2062517)

Brown, A.R., Huard, V. and Asenov, A. (2010) Statistical Simulation of Progressive NBTI Degradation in a 45-nm Technology pMOSFET. IEEE Transactions on Electron Devices, 57(9), pp. 2320-2323. (doi:10.1109/TED.2010.2052694)

Brown, A., Idris, N., Watling, J. and Asenov, A. (2010) Impact of metal gate granularity on threshold voltage variability: a full-scale 3D statistical simulation study. IEEE Electron Device Letters, 31(11), pp. 1199-1201. (doi:10.1109/LED.2010.2069080)

Martinez, A., Seoane, N., Brown, A.R., Barker, J.R. and Asenov, A. (2010) Variability in Si nanowire MOSFETs due to the combined effect of interface roughness and random dopants: a fully three-dimensional NEGF simulation study. IEEE Transactions on Electron Devices, 57(7), pp. 1626-1635. (doi:10.1109/TED.2010.2048405)

Cheng, B., Brown, A.R., Roy, S. and Asenov, A., (2010) PBTI/NBTI-related variability in TB-SOI and DG MOSFETs. IEEE Electron Device Letters, 31(5), pp. 408-410. (doi:10.1109/LED.2010.2043812)

Bukhori, M.F., Roy, S. and Asenov, A. (2010) Simulation of statistical aspects of charge trapping and related degradation in bulk MOSFETs in the presence of random discrete dopants. IEEE Transactions on Electron Devices, 57(4), pp. 795-803. (doi:10.1109/TED.2010.2041859)

Benbakhti, B., Ayubi-Moak, J.S., Kalna, K., Lin, D., Hellings, G., Brammertz, G., De Meyer, K., Thayne, I.G. and Asenov, A. (2010) Impact of interface state trap density on the performance characteristics of different III-V MOSFET architectures. Microelectronics Reliability, 50(3), pp. 360-364. (doi:10.1016/j.microrel.2009.11.017)

Bindu, B., Cheng, B., Roy, G., Wang, X., Roy, S. and Asenov, A. (2010) Parameter set and data sampling strategy for accurate yet efficient statistical MOSFET compact model extraction. Solid-State Electronics, 54(3), pp. 307-315. (doi:10.1016/j.sse.2009.09.028)

Benbakhti, B. et al. (2010) Performance analysis of the new implant-free quantum-well CMOS : DualLogic approach. Solid State Electronics Journal, (Unpublished)

Cheng, B.J., Dideban, D., Moezi, N., Millar, C., Roy, G., Wang, X., Roy, S. and Asenov, A. (2010) Statistical-variability compact-modeling strategies for BSIM4 and PSP. IEEE Design and Test of Computers, 27(2), pp. 26-35. (doi:10.1109/MDT.2010.53)

Markov, S., Shushko, P., Fiegna, C., Sangiorgi, E., Shluger, A. and Asenov, A. (2010) From ab initio properties of the Si-Si02 interface, to electrical characteristics of metal-oxide-semiconductor devices. Journal of Physics: Conference Series, 242(1), (doi:10.1088/1742-6596/242/1/012010)

Martinez, A., Barker, J., Seoane, N., Brown, A. and Asenov, A. (2010) Dopants and roughness induced resonances in thin Si nanowire transistors: A self-consistent NEGF-poisson study. Journal of Physics: Conference Series, 220(1), 012009. (doi:10.1088/1742-6596/220/1/012009)

Martinez, A., Brown, A. and Asenov, A. (2010) Full-band NEGF simulations of surface roughness in Si nanowires. Journal of Physics: Conference Series, 242(1), 012016. (doi:10.1088/1742-6596/242/1/012016)

Riddet, C., Watling, J., Chan, K. and Asenov, A. (2010) Monte Carlo simulation study of the impact of strain and substrate orientation on hole mobility in Germanium. Journal of Physics: Conference Series, 242(1), 012017. (doi:10.1088/1742-6596/242/1/012017)

Watling, J., Riddet, C., Chan, K. and Asenov, A. (2010) Simulation of hole-mobility in doped relaxed and strained Ge layers. Journal of Applied Physics, 108(9), 093715.

Palestri, P. et al. (2009) A comparison of advanced transport models for the computation of the drain current in nanoscale nMOSFETs. Solid-State Electronics, 53(12), pp. 1293-1302. (doi:10.1016/j.sse.2009.09.019)

Reid, D., Millar, C., Roy, G., Roy, S. and Asenov, A. (2009) Analysis of threshold voltage distribution due to random dopants: a 100 000-sample 3-D simulation study. IEEE Transactions on Electron Devices, 56(10), pp. 2255-2263. (doi:10.1109/TED.2009.2027973)

Ayubi-Moak, J.S., Benbakhti, B., Kalna, K., Paterson, G.W., Hill, R., Passlack, M., Thayne, I.G. and Asenov, A. (2009) Effect of interface state trap density on the characteristics of n-type, enhancement-mode, implant-free In0.3Ga0.7As MOSFETs. Microelectronic Engineering, 86(7-9), pp. 1564-1567. (doi:10.1016/j.mee.2009.03.024)

Cheng, B., Roy, S., Brown, A.R., Millar, C. and Asenov, A. (2009) Evaluation of statistical variability in 32 and 22 nm technology generation LSTP MOSFETs. Solid-State Electronics, 53(7), pp. 767-772. (doi:10.1016/j.sse.2009.03.008)

Reid, D., Millar, C., Roy, S., Roy, G., Sinnott, R.O., Stewart, G., Stewart, G. and Asenov, A. (2009) Enabling cutting-edge semiconductor simulation through grid technology. Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences, 367(1897), pp. 2573-2584. (doi:10.1098/rsta.2009.0031)

Seoane, N., Garcia-Loureiro, A., Aldegunde, M., Kalna, K. and Asenov, A. (2009) Impact of intrinsic parameter fluctuations on the performance of In0.75Ga0.25As implant free MOSFETs. Semiconductor Science and Technology, 24(5), (doi:10.1088/0268-1242/24/5/055011)

Asenov, A., Brown, A., Roy, G., Cheng, B., Alexander, C., Riddet, C., Kovac, U., Martinez, A., Seoane, N. and Roy, S. (2009) Simulation of statistical variability in nano-CMOS transistors using drift-diffusion, Monte Carlo and non-equilibrium Green's function techniques. Journal of Computational Electronics, 8(3-4), pp. 349-373. (doi:10.1007/s10825-009-0292-0)

Benbakhti, B., Ayubi-Moak, J.S., Kalna, K. and Asenov, A. (2009) Effect of Interface State Trap Density on the Performance of Scaled Surface Channel In0.3Ga0.7As MOSFETs. Journal of Physics: Conference Series, 193, (doi:10.1088/1742-6596/193/1/012122)

Brown, A.R., Martinez, A., Seoane, N. and Asenov, A. (2009) Comparison of Density Gradient and NEGF for 3D Simulation of a Nanowire MOSFET. Proceedings of the 2009 Spanish Conference on Electron Devices, pp. 140-143.

Martinez, A., Brown, A.R., Seoane, N. and Asenov, A. (2009) Perturbative vs non-perturbative impurity scattering in a narrow Si nanowire GAA transistor: A NEGF study. Journal of Physics: Conference Series, 193(1), (doi:10.1088/1742-6596/193/1/012047)

Martinez, A., Kalna, K., Sushko, P.V., Shluger, A.L., Barker, J.R. and Asenov, A. (2009) Impact of Body-Thickness-Dependent Band Structure on Scaling of Double-Gate MOSFETs: A DFT/NEGF Study. IEEE Transactions on Nanotechnology, 8(2), pp. 159-166. (doi:10.1109/TNANO.2008.917776)

Martinez, A., Seoane, N., Brown, A.R., Barker, J.R. and Asenov, A. (2009) 3-D Nonequilibrium Green's Function Simulation of Nonperturbative Scattering From Discrete Dopants in the Source and Drain of a Silicon Nanowire Transistor. IEEE Transactions on Nanotechnology, 8(5), pp. 603-610. (doi:10.1109/TNANO.2009.2020980)

Seoane, N., Martinez, A., Brown, A.R., Barker, J.R. and Asenov, A. (2009) Current variability in Si nanowire MOSFETs due to random dopants in the source/drain regions: a fully 3-D NEGF simulation study. IEEE Transactions on Electron Devices, 56(7), pp. 1388-1395. (doi:10.1109/TED.2009.2021357)

Thayne, I.G. et al. (2009) Review of current status of III-V MOSFETs. ECS Transactions, 19(5), pp. 275-286. (doi:10.1149/1.3119552)

Alexander, C., Roy, G. and Asenov, A. (2008) Random-dopant-induced drain current variation in Nano-MOSFETs: a three-dimensional self-consistent Monte Carlo simulation study using "ab initio" ionized impurity scattering. IEEE Transactions on Electron Devices, 55(11), pp. 3251-3258. (doi:10.1109/TED.2008.2004647)

Thayne, I. G., Hill, R. J. W., Moran, D.A.J., Kalna, K., Asenov, A. and Passlack, M. (2008) Comments on "High Performance Inversion-Type Enhancement-Mode InGaAs MOSFET With Maximum Drain Current Exceeding 1 A/mm". IEEE Electron Device Letters, 29(10), pp. 1085-1086. (doi:10.1109/LED.2008.2002752)

Kalna, K., Seoane, N., Garcia-Loureiro, A. J., Thayne, I. G. and Asenov, A. (2008) Benchmarking of scaled InGaAs implant-free NanoMOSFETs. IEEE Transactions on Electron Devices, 55(9), pp. 2297-2306. (doi:10.1109/TED.2008.927658)

Riddet, C., Brown, A. R., Roy, S. and Asenov, A. (2008) Boundary conditions for Density Gradient corrections in 3D Monte Carlo simulations. Journal of Computational Electronics, 7(3), pp. 231-235. (doi:10.1007/s10825-008-0222-6)

Asenov, A., Cathignol, A., Cheng, B., McKenna, K. P., Brown, A. R., Shluger, A. L., Chanemougame, D., Rochereau, K. and Ghibaudo, G. (2008) Origin of the asymmetry in the magnitude of the statistical variability of n- and p-channel poly-Si gate bulk MOSFETs. IEEE Electron Device Letters, 29(8), pp. 913-915. (doi:10.1109/LED.2008.2000843)

Sinnott, R.O., Millar, C. and Asenov, A. (2008) Supercomputing at work in the nanoCMOS electronics domain. ERCIM News, 74, pp. 22-23.

Watling, J. R., Brown, A. R., Ferrari, G., Barker, J. R., Bersuker, G., Zeitzoff, P. and Asenov, A. (2008) Impact of high-kappa gate stacks on transport and variability in nano-CMOS devices. Journal of Computational and Theoretical Nanoscience, 5(6), pp. 1072-1088.

Hill, R.J.W. et al. (2008) 1 μm gate length, In0.75Ga0.25As channel, thin body n-MOSFET on InP substrate with transconductance of 737μS/μm. Electronics Letters, 44, pp. 498-500. (doi:10.1049/el:20080470)

Aldegunde, M., Seoane, N., Garcia-Loureiro, A. J., Sushko, P. V., Shluger, A. L., Gavartin, J. L., Kalna, K., and Asenov, A., (2008) Atomistic mesh generation for the simulation of nanoscale metal-oxide-semiconductor field-effect transistors. Physical Review E, 77(5), (doi:10.1103/PhysRevE.77.056702)

Brown, A. R. and Asenov, A. (2008) Capacitance fluctuations in bulk MOSFETs due to random discrete dopants. Journal of Computational Electronics, 7(3), pp. 115-118. (doi:10.1007/s10825-008-0181-y)

Bukhori, M. F., Roy, S. and Asenov, A. (2008) Statistical aspects of reliability in bulk MOSFETs with multiple defect states and random discrete dopants. Microelectronics Reliability, 48(8-9), pp. 1549-1552. (doi:10.1016/j.microrel.2008.06.029)

Cathignol, A., Cheng, B., Chanemougame, D., Brown, A. R., Rochereau, K., Ghibaudo, G. and Asenov, A. (2008) Quantitative evaluation of statistical variability sources in a 45-nm-technological node LP N-MOSFET. IEEE Electron Device Letters, 29(6), pp. 609-611. (doi:10.1109/LED.2008.922978)

Drysdale, T. D., Brown, A. R., Roy, G., Roy, S. and Asenov, A. (2008) Capacitance variability of short range interconnects. Journal of Computational Electronics, 7(3), pp. 124-127. (doi:10.1007/s10825-007-0154-6)

Kalna, K., Martinez, A., Svizhenko, A., Anantram, M. P., Barker, J. R. and Asenov, A. (2008) NEGF Simulations of the effect of strain on scaled double gate NanoMOSFETs. Journal of Computational Electronics, 7(3), pp. 288-292. (doi:10.1007/s10825-008-0212-8)

Kovac, U., Reid, D., Millar, C., Roy, G., Roy, S. and Asenov, A. (2008) Statistical simulation of random dopant induced threshold voltage fluctuations for 35 nm channel length MOSFET. Microelectronics Reliability, 48(8-9), pp. 1572-1575. (doi:10.1016/j.microrel.2008.06.027)

Markov, S., Sushko, P.V., Roy, S., Fiegna, C., Sangiorgi, E., Shluger, A.L. and Asenov, A. (2008) Si-Sio(2) interface band-gap transition - effects on MOS inversion layer. Physica Status Solidi A: Applications and Materials Science, 205(6), pp. 1290-1295. (doi:10.1002/pssa.200778154)

Martinez, A., Barker, J. R., Svizhenko, A., Anantram, M. P., Bescond, M. and Asenov, A. (2008) Ballistic Quantum Simulators for Studying Variability in Nanotransistors. Journal of Computational and Theoretical Nanoscience, 5(12), pp. 2289-2310. (doi:10.1166/jctn.2008.1201)

Martinez, A., Bescond, M., Brown, A., Barker, J. R. and Asenov, A. (2008) A full 3D non-equilibrium Green functions study of a stray charge in a nanowire MOS transistor. Journal of Computational Electronics, 7(3), pp. 359-362. (doi:10.1007/s10825-008-0240-4)

Martinez, A., Kalna, K., Svizhenko, A., Anantram, M.P., Barker, J.R. and Asenov, A. (2008) Impact of strain on scaling of Double Gate nanoMOSFETs using NEGF approach. Physica Status Solidi C, 5(1), pp. 47-51.

Millar, C., Madathil, R., Beckstein, O., Sansom, M. S. P., Roy, S. and Asenov, A. (2008) Brownian simulation of charge transport in α-Haemolysin. Journal of Computational Electronics, 7(1), pp. 28-33. (doi:10.1007/s10825-008-0230-6)

Millar, C., Reid, D., Roy, G., Roy, S. and Asenov, A. (2008) Accurate statistical description of random dopant-induced threshold voltage variability. IEEE Electron Device Letters, 29(8), pp. 946-948. (doi:10.1109/LED.2008.2001030)

Paluchowski, S. H., Cheng, B., Roy, S., Asenov, A. and Cumming, D. R. S. (2008) Investigation into effects of device variability on CMOS layout motifs. Electronics Letters, 44(10), pp. 626-627. (doi:10.1049/el:20080447)

Passlack, M., Droopad, R., Thayne, I.G. and Asenov, A. (2008) III-V MOSFETs for future transistor applications. Solid State Technology, 51(12), pp. 26-30.

Seoane, N., Garcia-Loureiro, A. J., Kalna, K. and Asenov, A. (2008) Random dopant related variability in the 30 nm gate length In0.75Ga0.25As implant free MOSFET. Journal of Computational Electronics, 7(3), pp. 159-163. (doi:10.1007/s10825-008-0233-3)

Hill, R.J.W. et al. (2007) Enhancement-mode GaAs MOSFETs with an In0.3 Ga0.7As channel, a mobility of over 5000 cm2/V ·s, and transconductance of over 475 μS/μm. IEEE Electron Device Letters, 28(12), pp. 1080-1082. (doi:10.1109/LED.2007.910009)

Brown, A.R., Roy, G. and Asenov, A. (2007) Poly-Si-gate-related variability in decananometer MOSFETs with conventional architecture. IEEE Transactions on Electron Devices, 54(11), pp. 3056-3063. (doi:10.1109/TED.2007.907802)

Martinez, A., Barker, J.R., Asenov, A., Svizhenko, A. and Anantram, M.P. (2007) Developing a full 3D NEGF simulator with random dopant and interface roughness. Journal of Computational Electronics, 6(1-3), pp. 215-218. (doi:10.1007/s10825-006-0104-8)

Martinez, A., Bescond, M., Barker, J.R., Svizhenko, A., Anantram, M.P., Millar, C. and Asenov, A. (2007) A self-consistent full 3-D real-space NEGF simulator for studying nonperturbative effects in nano-MOSFETs. IEEE Transactions on Electron Devices, 54(9), pp. 2213-2222. (doi:10.1109/TED.2007.902867)

Ferrari, G., Watling, J.R., Roy, S., Barker, J.R. and Asenov, A. (2007) Beyond SiO2 technology: simulation of the impact of high-κ dielectrics on mobility. Journal of Non-Crystalline Solids, 353(5-7), pp. 630-634. (doi:10.1016/j.jnoncrysol.2006.10.044)

Markov, S., Brown, A.R., Cheng, B.J., Roy, G., Roy, S. and Asenov, A. (2007) Three-dimensional statistical simulation of gate leakage fluctuations due to combined interface roughness and random dopants. Japanese Journal of Applied Physics, 46(4S), pp. 2112-2116. (doi:10.1143/JJAP.46.2112)

Kalna, K., Wilson, J.A., Moran, D.A.J., Hill, R.J.W., Long, A.R., Droopad, R., Passlack, M., Thayne, I.G. and Asenov, A. (2007) Monte Carlo simulations of high-performance implant free In0.3Ga0.7 nano-MOSFETs for low-power CMOS applications. IEEE Transactions on Nanotechnology, 6(1), pp. 106-112. (doi:10.1109/TNANO.2006.888543)

Asenov, A., Kalna, K., Thayne, I. and Hill, R. (2007) Simulation of implant free III-V MOSFETs for high performance low power Nano-CMOS applications. Microelectronic Engineering, 84, pp. 2398-2403. (doi:10.1016/j.mee.2007.04.117)

Cheng, B., Roy, S. and Asenov, A. (2007) CMOS 6-T SRAM cell design subject to ''atomistic" fluctuations. Solid-State Electronics, 51, pp. 565-571. (doi:10.1016/j.sse.2007.02.009)

Ferrari, G., Watling, J.R., Roy, S., Barker, J.R. and Asenov, A. (2007) Beyond SiO2 technology: Simulation of the impact of high-kappa dielectrics on mobility. Journal of Non-Crystalline Solids, 353, pp. 630-634. (doi:10.1016/j.jnoncrysol.2006.10.004)

Fujihashi, C., Yukiya, T. and Asenov, A. (2007) Electron and hole current characteristics of n-i-p-type semiconductor quantum dot transistor. IEEE Transactions on Nanotechnology, 6, pp. 320-327. (doi:10.1109/TNANO.2007.893570)

Kalna, K., Droopad, R., Passlack, M. and Asenov, A. (2007) Monte Carlo simulations of InGaAs nano-MOSFETs. Microelectronic Engineering, 84, pp. 2150-2153. (doi:10.1016/j.mee.2007.04.011)

Martinez, A., Barker, J., Svizhenko, A., Anantram, M. and Asenov, A. (2007) The impact of random dopant aggregation in source and drain on the performance of ballistic DG Nano-MOSFETs: A NEGF study. IEEE Transactions on Nanotechnology, 6, pp. 438-445. (doi:10.1109/TNANO.2007.899638)

Martinez, A., Kalna, K., Barker, J. and Asenov, A. (2007) A study of the interface roughness effect in Si nanowires using a full 3D NEGF approach. Physica E: Low-Dimensional Systems and Nanostructures, 37, pp. 168-172. (doi:10.1016/j.physe.2006.07.007)

Millar, C., Roy, S., Brown, A.R. and Asenov, A. (2007) Simulating the bio-nanoelectronic interface. Journal of Physics: Condensed Matter, 19, (doi:10.1088/0953-8984/19/21/215205)

Riddet, C., Brown, A.R., Alexander, C.L., Watling, J.R., Roy, S. and Asenov, A. (2007) 3-D Monte Carlo simulation of the impact of quantum confinement scattering on the magnitude of current fluctuations in double gate MOSFETs. IEEE Transactions on Nanotechnology, 6, pp. 48-55. (doi:10.1109/TNANO.2006.886739)

Samsudin, K., Adamu-Lerna, F., Brown, A.R., Roy, S. and Asenov, A. (2007) Combined sources of intrinsic parameter fluctuations in sub-25 nm generation UTB-SOI MOSFETs: A statistical simulation study. Solid-State Electronics, 51, pp. 611-616. (doi:10.1016/j.sse.2007.02.022)

Seoane, N., Garcia-Loureiro, A.J., Kalna, K. and Asenov, A. (2007) Impact of intrinsic parameter fluctuations on the performance of HEMTs studied with a 3D parallel drift-diffusion simulator. Solid-State Electronics, 51, pp. 481-488. (doi:10.1016/j.sse.2007.01.030)

Roy, G., Brown, A.R., Adamu-Lema, F., Roy, S. and Asenov, A. (2006) Simulation study of individual and combined sources of intrinsic parameter fluctuations in conventional nano-MOSFETs. IEEE Transactions on Electron Devices, 53(12), pp. 3063-3070. (doi:10.1109/TED.2006.885683)

Asenov, A. (2006) Green function study of quantum transport in ultra-small devices with embedded atomistic cluster. Journal of Physics: Conference Series, 38(1), pp. 233-246. (doi:10.1088/1742-6596/35/1/021)

Asenov, A. (2006) The unintentional discrete charges in a nominally undoped channel of a thin body double gate MOSFET: Classical to Full Quantum Simulation. Journal of Physics: Conference Series, 38(1), pp. 192-195. (doi:10.1088/1742-6596/38/1/046)

Barker, J.R., Martinez, A., Svizhenko, A., Anantram, A. and Asenov, A. (2006) Green function study of quantum transport in ultra-small devices with embedded atomistic clusters. Journal of Physics: Conference Series, 35, pp. 233-246. (doi:10.1088/1742-6596/35/1/021)

Ferrari, G., Watling, J., Roy, S., Barker, J., Zeitzoff, P., Bersuker, G. and Asenov, A. (2006) Monte Carlo study of mobility in Si devices with HfO2-based oxides. Materials Science in Semiconductor Processing, 9, pp. 995-999. (doi:10.1016/j.mssp.2006.10.035)

Kalna, K., Wang, Q., Passlack, M. and Asenov, A. (2006) Monte Carlo simulations of delta-doping placement in sub-100 nm implant free InGaAs MOSFETs. Materials Science and Engineering B: Solid-State Materials for Advanced Technology, 135, pp. 285-288. (doi:10.1016/j.mseb.2006.08.019)

Martinez, A., Svizhenko, A., Anantram, M.P., Barker, J.R. and Asenov, A. (2006) A NEGF study of the effect of surface roughness on CMOS nanotransistors. Journal of Physics: Conference Series, 35(1), pp. 269-274. (doi:10.1088/1742-6596/35/1/024)

Samsudin, K., Cheng, B., Brown, A.R., Roy, S. and Asenov, A. (2006) Integrating intrinsic parameter fluctuation description into BSIMSOI to forecast sub-15 nm UTB SOI based 6T SRAM operation. Solid-State Electronics, 50, pp. 86-93. (doi:10.1016/j.sse.2005.10.048)

Samsudin, K., Cheng, B., Brown, A.R., Roy, S. and Asenov, A. (2006) Sub-25 nm UTB SOISRAM cell under the influence of discrete random dopants. Solid-State Electronics, 50, pp. 660-667. (doi:10.1016/j.sse.2006.03.019)

Cheng, B., Roy, S., Roy, G., Adamu-Lema, F. and Asenov, A. (2005) Impact of intrinsic parameter fluctuations in decanano MOSFETs on yield and functionality of SRAM cells. Solid-State Electronics, 49(5), pp. 740-746. (doi:10.1016/j.sse.2004.09.005)

Alexander, C., Brown, A.R., Watling, J.R. and Asenov, A. (2005) Impact of scattering in 'atomistic' device simulations. Solid-State Electronics, 49, pp. 733-739. (doi:10.1016/j.sse.2004.10.012)

Alexander, C., Brown, A., Watling, J. and Asenov, A. (2005) Impact of single charge trapping in nano-MOSFETs - Electrostatics versus transport effects. IEEE Transactions on Nanotechnology, 4, pp. 339-344. (doi:10.1109/TNANO.2005.846929)

Garcia-Loureiro, A.J., Kalna, K. and Asenov, A. (2005) Efficient three-dimensional parallel simulations of PHEMTs. International Journal of Numerical Modelling-Electronic Networks Devices and Fields, 18, pp. 327-340. (doi:10.1002/jnm.581)

Millar, C., Asenov, A. and Roy, S. (2005) Self-consistent particle simulation of ion channels. Journal of Computational and Theoretical Nanoscience, 2, pp. 56-67. (doi:10.1166/jctn.2005.004)

Watling, J., Yang, L., Asenov, A., Barker, J. and Roy, S. (2005) Impact of high-k dielectric HfO2 on the mobility and device performance of sub-100-nm nMOSFETs. IEEE Transactions on Device and Materials Reliability, 5, pp. 103-108. (doi:10.1109/TDMR.2005.845238)

Alexander, C., Watling, J. and Asenov, A. (2004) Numerical carrier heating when implementing (PM)-M-3 to study small volume variations. Semiconductor Science and Technology, 19, S139-S141. (doi:10.1088/0268-1242/19/4/049)

Borici, M., Watling, J., Wilkins, R., Yang, L., Barker, J. and Asenov, A. (2004) Interface roughness scattering and its impact on electron transport in relaxed and strained Si n-MOSFETs. Semiconductor Science and Technology, 19, S155-S157. (doi:10.1088/0268-1242/19/4/054)

Kalna, K., Borici, M., Yang, L. and Asenov, A. (2004) Monte Carlo simulations of III-V MOSFETs. Semiconductor Science and Technology, 19, S202-S205. (doi:10.1088/0268-1242/19/4/069)

Kalna, K. and Asenov, A. (2004) Role of multiple delta doping in PHEMTs scaled to sub-100 nm dimensions. Solid-State Electronics, 48, pp. 1223-1232. (doi:10.1016/j.sse.2004.02.008)

Watling, J.R., Yang, L., Borici, M., Wilkins, R.C.W., Asenov, A., Barker, J.R. and Roy, S. (2004) The impact of interface roughness scattering and degeneracy in relaxed and strained Si n-channel MOSFETs. Solid-State Electronics, 48, pp. 1337-1346. (doi:10.1016/j.sse.2004.01.015)

Yang, L., Asenov, A., Watling, J., Borici, M., Barker, J., Roy, S., Elgaid, K., Thayne, I. and Hackbarth, T. (2004) Impact of device geometry and doping strategy on linearity and RF performance in Si/SiGe MODFETs. Microelectronics Reliability, 44, pp. 1101-1107. (doi:10.1016/j.microrel.2004.04.003)

Yang, L., Watling, J., Wilkins, R., Borici, M., Barker, J., Asenov, A. and Roy, S. (2004) Si/SiGe heterostructure parameters for device simulations. Semiconductor Science and Technology, 19, pp. 1174-1182.

Ma, W., Kaya, S. and Asenov, A. (2003) Study of RF linearity in sub-50nm MOSFETs using simulations. Journal of Computational Electronics, 2(2-4), pp. 347-352. (doi:10.1023/B:JCEL.0000011450.37111.9d)

Millar, C., Asenov, A. and Roy, S. (2003) Brownian ionic channel simulation. Journal of Computational Electronics, 2(2-4), pp. 257-262. (doi:10.1023/B:JCEL.0000011434.84806.6d)

Roy, S., Lee, A., Brown, A.R. and Asenov, A. (2003) Application of quasi-3D and 3D MOSFET simulations in the atomistic regime. Journal of Computational Electronics, 2(2-4), pp. 423-426. (doi:10.1023/B:JCEL.0000011464.17950.09)

Asenov, A., Brown, A.R., Davies, J.H., Kaya, S. and Slavcheva, G. (2003) Simulation of intrinsic parameter fluctuations in decananometer and nanometer-scale MOSFETs. IEEE Transactions on Electron Devices, 50(9), pp. 1837-1852. (doi:10.1109/TED.2003.815862)

Roy, G., Brown, A. R., Asenov, A. and Roy, S. (2003) Bipolar quantum corrections in resolving individual dopants in 'atomistic' device simulation. Superlattices and Microstructures, 34(3-6), pp. 327-334. (doi:10.1016/j.spmi.2004.03.066)

Asenov, A., Kaya, S. and Brown, A.R. (2003) Intrinsic parameter fluctuations in decananometer MOSFETs introduced by gate line edge roughness. IEEE Transactions on Electron Devices, 50(5), pp. 1254-1260. (doi:10.1109/TED.2003.813457)

Asenov, A., Balasubramaniam, R., Brown, A.R. and Davies, J.H. (2003) RTS amplitudes in decananometer MOSFETs: 3-D simulation study. IEEE Transactions on Electron Devices, 50(3), pp. 839-845. (doi:10.1109/TED.2003.811418)

Alexander, C., Watling, J., Brown, A. and Asenov, A. (2003) Artificial carrier heating due to the introduction of ab initio Coulomb scattering in Monte Carlo simulations. Superlattices and Microstructures, 34, pp. 319-326. (doi:10.1016/j.spmi.2004.03.025)

Asenov, A., Brown, A.R. and Watling, J.R. (2003) Quantum corrections in the simulation of decanano MOSFETs. Solid-State Electronics, 47, pp. 1141-1145. (doi:10.1016/S0038-1101(03)00030-3)

Brown, A., Adamu-Lema, F. and Asenov, A. (2003) Intrinsic parameter fluctuations in nanometre scale thin-body SOI devices introduced by interface roughness. Superlattices and Microstructures, 34, pp. 283-291. (doi:10.1016/j.spmi.2004.03.026)

Kalna, K. and Asenov, A. (2003) Nonequilibrium and ballistic transport, and backscattering in decanano HEMTs: a Monte Carlo simulation study. Mathematics and Computers in Simulation, 62, pp. 357-366.

Kalna, K., Yang, L. and Asenov, A. (2003) Simulation study of high performance III-V MOSFETs for digital applications. Journal of Computational Electronics, 2(2-4), pp. 341-345. (doi:10.1023/B:JCEL.0000011449.09021.55)

Lee, A., Brown, A., Asenov, A. and Roy, S. (2003) Random telegraph signal noise simulation of decanano MOSFETs subject to atomic scale structure variation. Superlattices and Microstructures, 34, pp. 293-300. (doi:10.1016/j.spmi.2004.03.027)

Brown, A.R., Asenov, A. and Watling, J.R. (2002) Intrinsic fluctuations in sub 10-nm double-gate MOSFETs introduced by discreteness of charge and matter. IEEE Transactions on Nanotechnology, 1(4), pp. 195-200. (doi:10.1109/TNANO.2002.807392)

Kaya, S., Asenov, A. and Roy, S. (2002) Breakdown of universal mobility curves in sub-100-nm MOSFETs. IEEE Transactions on Nanotechnology, 1(4), pp. 260-264. (doi:10.1109/TNANO.2002.807385)

Millar, C., Asenov, A. and Watling, J.R. (2002) Excessive over-relaxation method for multigrid poisson solvers. Journal of Computational Electronics, 1(3), pp. 341-345. (doi:10.1023/A:1020791306305)

Asenov, A., Kaya, S. and Brown, A.R. (2002) Implications of imperfect interfaces and edges in ultra-small MOSFET characteristics. Physica Status Solidi B: Basic Solid State Physics, 233(1), pp. 101-112. (doi:10.1002/1521-3951(200209)233:1<101::AID-PSSB101>3.0.CO;2-M)

Brown, A.R., Watling, J.R. and Asenov, A. (2002) A 3-D atomistic study of archetypal double gate MOSFET structures. Journal of Computational Electronics, 1(1-2), pp. 165-169. (doi:10.1023/A:1020704919992)

Asenov, A., Kaya, S. and Davies, J. H. (2002) Intrinsic threshold voltage fluctuations in decanano MOSFETs due to local oxide thickness variations. IEEE Transactions on Electron Devices, 49(1), pp. 112-119. (doi:10.1109/16.974757)

Kalna, K. and Asenov, A. (2002) Nonequilibrium transport in scaled high electron mobility transistors. Semiconductor Science and Technology, 17, pp. 579-584.

Kalna, K., Roy, S., Asenov, A., Elgaid, K. and Thayne, I. (2002) Scaling of pseudomorphic high electron mobility transistors to decanano dimensions. Solid-State Electronics, 46, pp. 631-638.

Prest, M.J. et al. (2002) Transconductance, carrier mobility and 1/f noise in Si/Si0.64Ge0.36/Si pMOSFETs. Materials Science and Engineering B: Solid-State Materials for Advanced Technology, 89, pp. 444-448.

Slavcheva, G., Davies, J. , Brown, A. and Asenov, A. (2002) Potential fluctuations in metal-oxide-semiconductor field-effect transistors generated by random impurities in the depletion layer. Journal of Applied Physics, 91, pp. 4326-4334. (doi:10.1063/1.1450031)

Unlu, H. and Asenov, A. (2002) Band offsets in III-nitride heterostructures. Journal of Physics D: Applied Physics, 35, pp. 591-594.

Asenov, A., Slavcheva, G., Brown, A.R. and Saini, S. (2001) Increase in the random dopant induced threshold fluctuations and lowering in sub-100 nm MOSFETs due to quantum effects: a 3-D density-gradient simulation study. IEEE Transactions on Electron Devices, 48(4), pp. 722-729. (doi:10.1109/16.915703)

Asenov, A., Slavcheva, G., Kaya, S. and Balasubramaniam, R. (2001) Quantum corrections to the 'atomistic' MOSFET simulations. VLSI Design, 13, 15-+.

Kalna, K., Asenov, A., Elgaid, K. and Thayne, I. (2001) Scaling of pHEMTs to decanano dimensions. VLSI Design, 13, pp. 435-439.

Knox, A.R., Asenov, A. and Lowe, A.C. (2001) An electron emission model for use with 3D electromagnetic finite element simulation. Solid-State Electronics, 45, pp. 841-851.

Palmer, M. et al. (2001) Effective mobilities in pseudomorphic Si/SiGe/Si p-channel metal-oxide-semiconductor field-effect transistors with thin silicon capping layers. Applied Physics Letters, 78, pp. 1424-1426.

Straube, U.N., Evans, A.G.R., Braithwaite, G., Kaya, S., Watling, J. and Asenov, A. (2001) On the mobility extraction for HMOSFETs. Solid-State Electronics, 45, pp. 527-529.

Watling, J.R., Zhao, Y.P., Asenov, A. and Barker, J.R. (2001) Non-equilibrium hole transport in deep sub-micron well-tempered Si p-MOSFETs. VLSI Design, 13, pp. 169-173.

Asenov, A. and Saini, S. (2000) Polysilicon gate enhancement of the random dopant induced threshold voltage fluctuations in sub-100 nm MOSFETs with ultrathin gate oxide. IEEE Transactions on Electron Devices, 47(4), pp. 805-812. (doi:10.1109/16.830997)

Asenov, A., Brown, A. R., Davies, J. H. and Saini, S. (1999) Hierarchical approach to 'atomistic' 3-D MOSFET simulation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 18(11), pp. 1558-1565. (doi:10.1109/43.806802)

Asenov, A. and Saini, S. (1999) Suppression of random dopant-induced threshold voltage fluctuations in sub-0.1-μm MOSFET's with epitaxial and delta-doped channels. IEEE Transactions on Electron Devices, 46(8), pp. 1718-1724. (doi:10.1109/16.777162)

Ternent, G., Asenov, A., Thayne, I.G., MacIntyre, D.S., Thom, S. and Wilkinson, C.D.W. (1999) SiGe p-channel MOSFETs with tungsten gate. Electronics Letters, 35(5), pp. 430-431. (doi:10.1049/el:19990305)

Asenov, A. (1998) Random dopant induced threshold voltage lowering and fluctuations in sub-0.1 μm MOSFET's: A 3-D 'atomistic' simulation study. IEEE Transactions on Electron Devices, 45(12), pp. 2502-2513. (doi:10.1109/16.735728)

Babiker, S., Asenov, A., Cameron, N., Beaumont, S. P. and Barker, J. R. (1998) Complete Monte Carlo RF analysis of 'real' short-channel compound FET's. IEEE Transactions on Electron Devices, 45(8), pp. 1644-1652. (doi:10.1109/16.704358)

Babiker, S., Asenov, A., Cameron, N. and Beaumont, S.P. (1996) Simple approach to include external resistances in the Monte Carlo simulation of MESFETs and HEMTs. IEEE Transactions on Electron Devices, 43(11), pp. 2032-2034. (doi:10.1109/16.543047)

Cameron, N.I., Murad, S., McLelland, H., Asenov, A., Taylor, M.R.S., Holland, M.C. and Beaumont, S.P. (1996) Gate recess engineering of pseudomorphic In0.30GaAs/GaAs HEMTs. Electronics Letters, 32(8), pp. 770-772.

Speckbacher, P., Berger, J., Asenov, A., Koch, D. and Weber, W. (1995) The 'gated-diode' configuration in MOSFET's, a sensitive tool for characterizing hot-carrier degradation. IEEE Transactions on Electron Devices, 42(7), pp. 1287-1296. (doi:10.1109/16.391211)

Marczewski, J., Zachau, M., Asenov, A., Koch, F. and Gruetzmacher, D. (1992) A diode device combining lateral field-effect transport and vertical tunneling in a multi-quantum-well heterostructure. IEEE Electron Device Letters, 13(6), pp. 338-340. (doi:10.1109/55.145077)

Speckbacher, P., Asenov, A., Bollu, M., Koch, F. and Weber, W. (1990) Hot-carrier-induced deep-level defects from gated-diode measurements on MOSFETs. IEEE Electron Device Letters, 11(2), pp. 95-97. (doi:10.1109/55.46940)

Books

Reid, D., Millar, C., Roy, S., Roy, G., Sinnott, R., Stewart, G. and Asenov, A. (2008) An accurate statistical analysis of random dopant induced variability in 140,00013nm MOSFETs. IEEE, pp. 79-80. ISBN 9781424420711 (doi:10.1109/SNW.2008.5418478)

Book Sections

Wang, X., Georgiev, V. P. , Adamu-Lema, F., Gerrer, L., Amoroso, S. M. and Asenov, A. (2017) TCAD-based design technology co-optimization for variability in nanoscale SOI FinFETs. In: Deleonibus, S. (ed.) Integrated Nanodevice and Nanosystem Fabrication. Series: Pan Stanford series on intelligent nanosystems. Routledge. ISBN 9789814774222 (In Press)

Lorenz, J., Bar, E., Burenkov, A., Evanschitzky, P., Asenov, A., Wang, L., Wang, X., Brown, A. R., Millar, C. and Reid, D. (2014) Simultaneous simulation of systematic and stochastic process variations. In: Proceedings of the 19th International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Yokohama Japan, 8-11 Sept. 2014. IEEE, pp. 289-292. ISBN 9781479952878 (doi:10.1109/SISPAD.2014.6931620)

Asenov, A., Cheng, B., Brown, A.R. and Wang, X. (2013) Impact of statistical variability on FinFET technology: from device, statistical compact modelling to statistical circuit simulation. In: van Roermund, A.H.M., Baschirotto, A. and Steyaert, M. (eds.) Nyquist AD Converters, Sensor Interfaces, and Robustness. Springer, pp. 281-291. ISBN 9781461445876 (doi:10.1007/978-1-4614-4587-6_15)

Wang, X., Brown, A.R., Cheng, B. and Asenov, A. (2013) Drain bias impact on statistical variability and reliability in 20 nm bulk CMOS technology. In: 14th International Conference on Ultimate Integration on Silicon (ULIS), Warwick, UK, 19-21 March 2013. IEEE, pp. 65-68. ISBN 978-1-4673-4800-3 (doi:10.1109/ULIS.2013.6523492)

Asenov, A. (2010) Statistical nano CMOS variability and its impact on SRAM. In: Singhee, A. and Rutenbar, R.A. (eds.) Extreme Statistics in Nanoscale Memory Design. Springer, pp. 17-50. ISBN 9781441966056 (doi:10.1007/978-1-4419-6606-3_3)

Sinnott, R.O., Stewart, G., Asenov, A., Millar, C., Reid, D., Roy, G., Roy, S., Davenhall, C., Harbulot, B. and Jones, M. (2010) E-infrastructure support for nanoCMOS device and circuit simulations. In: Hamza, M.H. (ed.) Proceedings of the Conference on Parallel and Distributed Computing and Networks, Innsbruck, Austria, 16-18th February 2010. ACTA Press: Anaheim, USA. ISBN 9780889868342

Sinnott, R.O., Stewart, G., Asenov, A., Millar, C., Reid, D., Roy, G., Roy, S., Davenhall, C., Harbulot, B. and Jones, M. (2009) Multi-level simulations to support nanoCMOS electronics research. In: 2009 ASME Design Engineering Technical Conferences and Computers and Information in Engineering Conference DETC2009, August 30-September 2, 2009, San Diego, California, USA. American Society of Mechanical Engineers: New York, USA. ISBN 9780791838563

Ayubi-Moak, J.S., Kalna, K. and Asenov, A. (2009) High-performance in0.75Ga0.25As implant-free n-type MOSFETs for low power applications. In: Electron Devices, 2009. CDE 2009. Spanish Conference on. IEEE, pp. 92-95. ISBN 9781424428380 (doi:10.1109/SCED.2009.4800438)

Reid, D., Millar, C., Roy, G., Roy, S. and Asenov, A. (2009) Statistical enhancement of combined simulations of RDD and LER variability: what can simulation of a 105 sample teach us? In: Proceedings of the 2009 IEEE International Electron Devices Meeting (IEDM), Baltimore, USA, 7-9 December 2009. IEEE Computer Society, pp. 657-660. ISBN 9781424456390 (doi:10.1109/IEDM.2009.5424241)

Cheng, B., Roy, S., Brown, A., Millar, C. and Asenov, A. (2008) Evaluation of Intrinsic Parameter Fluctuations on 45, 32 and 22nm Technology Node LP N-MOSFETs. In: ESSDERC 2008: Proceedings of the 38th European Solid-State Device Research Conference. Series: Proceedings of the European Solid-State Device Research Conference. IEEE: New York, pp. 47-50. ISBN 978-1-4244-2363-7 (doi:10.1109/ESSDERC.2008.4681695)

Cheng, B., Roy, S., Brown, A.R., Millar, C. and Asenov, A. (2008) Statistical variations in 32nm thin-body SOI devices and SRAM cells. In: 9th International Conference on Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. IEEE, pp. 389-392. ISBN 9781424421855 (doi:10.1109/ICSICT.2008.4734546)

Hill, R.J.W., Moran, D.A.J., Li, X., Zhou, H., Macintyre, D.S., Thoms, S., Asenov, A. and Thayne, I.G. (2008) Ino.75Gao.25As channel III–V MOSFETs with leading performance metrics. In: Proceedings of the IEEE Silicon Nanoelectronics Workshop, 15-16 June 2008, Honolulu, Hawaii. IEEE Computer Society: Piscataway, N.J., USA. ISBN 9781424420711 (doi:10.1109/SNW.2008.5418447)

Martinez, A., Barker, J. R., Bescond, M., Brown, A. R. and Asenov, A. (2008) Performance variability in wrap-round gate silicon nano-transistors: a 3D self-consistent NEGF study of ballistic flows for atomistically-resolved source and drain - art. no. 012026. In: Goodnick, S.M. and Ferry, D.K. (eds.) International Symposium on Advanced Nanodevices and Nanotechnology. Series: Journal of Physics Conference Series (109). IOP Publishing: Bristol, p. 12026. ISBN 1742-6588

Reid, D., Millar, C., Roy, G., Roy, S., Sinnott, R.O., Stewart, G. and Asenov, A. (2008) Prediction of random dopant induced threshold voltage fluctuations in NanoCMOS transistors. In: Proceedings of the International Conference on Simulation of Semiconductor Processes and Devices, 9-11 Sept 2008, Hakone, Japan. IEEE Computer Society: Piscataway, N.J., USA, pp. 21-24. ISBN 9781424417537 (doi:10.1109/SISPAD.2008.4648227)

Reid, D., Millar, C., Roy, G., Roy, S., Sinnott, R.O., Stewart, G. and Asenov, A. (2008) An accurate statistical analysis of random dopant induced variability in 140,000 13nm MOSFET. In: Proceedings of the IEEE Silicon Nanoelectronics Workshop, 15-16 June 2008, Honolulu, Hawaii. IEEE Computer Society: Piscataway, N.J., USA. ISBN 9781424420711 (doi:10.1109/SNW.2008.5418478)

Sinnott, R.O. et al. (2008) Secure, performance-oriented data management for nanoCMOS electronics. In: Fourth IEEE International Conference on E-Science: 7-12 December 2008, Indiana, USA. IEEE Computer Society: Piscataway, N.J., USA, pp. 87-94. (doi:10.1109/eScience.2008.21)

Sinnott, R.O. et al. (2008) Integrating security solutions to support nanoCMOS electronics research. In: Proceedings of the 2008 International Symposium on Parallel and Distributed Processing with Applications: 10-12 December 2008, Sydney, NSW, Australia. IEEE Computer Society: Los Alamitos, USA, pp. 71-79. ISBN 9780769534718 (doi:10.1109/ISPA.2008.132)

Wang, X., Roy, S. and Asenov, A. (2008) High performance MOSFET scaling study from bulk 45nm technology generation. In: Proceeding of the 9th International Conference on Solid-State and Integrated-Circuit Technology: 20-23 October 2008, Beijing, China. IEEE Computer Society: Piscataway, N.J., USA, pp. 484-487. ISBN 9781424421855 (doi:10.1109/ICSICT.2008.4734586)

Wang, X., Roy, S. and Asenov, A. (2008) Impact of strain on LER variability in bulk MOSFETs. In: Proceedings of the 38th European Solid-state Device Research Conference, 15-19 September 2008, Edinburgh, UK. IEEE Computer Society: Piscataway, N.J., USA, pp. 190-193. ISBN 9781424423637 (doi:10.1109/ESSDERC.2008.4681730)

Sinnott, R.O., Asenov, A., Brown, A., Millar, C., Roy, G., Roy, S. and Stewart, G. (2007) Grid infrastructures for the electronics domain: requirements and early prototypes from an EPSRC pilot project. In: Cox, S.J. (ed.) Proceedings of the UK e-Science All Hands Meeting 2007, Nottingham, UK, 10th-13th September 2007. National e-Science Centre: Edinburgh. ISBN 9780955398834

Sinnott, R.O. et al. (2006) Meeting the design challenges of nano-CMOS electronics: an introduction to an upcoming EPSRC pilot project. In: Cox, S.J. (ed.) Proceedings of the UK e-Science All Hands Meeting 2006 : Nottingham, UK, 18th-21st September. National e-Science Centre: Edinburgh. ISBN 9780955398810

Asenov, A., Brown, A.R. and Kaya, S. (2004) Atomistic simulation of decanano MOSFETs. In: Dabrowski, J. and Weber, E.R. (eds.) Predictive Simulation of Semiconductor Processing: Status and Challenges. Series: Springer series in materials science (72). Springer-Verlag: Berlin, Germany, pp. 111-153. ISBN 9783540204817

Conference or Workshop Item

Lee, J., Sadi, T., Georgiev, V. P. , Todri-Sanial, A. and Asenov, A. (2017) A Hierarchical Model for CNT and Cu-CNT Composite Interconnects: From Density Functional Theory to Circuit-Level Simulations. International Workshop on Computational Nanotechnology, Windermere, UK, 5-9 June 2017. (Unpublished)

Al-Ameri, T., Georgiev, V.P. , Adamu-Lema, F. and Asenov, A. (2017) Position-Dependent Performance in 5 nm Vertically Stacked Lateral Si Nanowires Transistors. International Workshop on Computational Nanotechnology, Windermere, UK, 5-9 June 2017.

Al-Ameri, T., Georgiev, V.P. , Adamu-Lema, F. and Asenov, A. (2017) Variability-aware Simulations of 5 nm Vertically Stacked Lateral Si Nanowires Transistors. International Workshop on Computational Nanotechnology, Windermere, UK, 5-9 June 2017.

Sadi, T., Wang, L. and Asenov, A. (2016) Advanced Simulation of Resistance Switching in Si-rich Silica RRAM Devices. 2016 IEEE Silicon Nanoelectronics Workshop (SNW), Honolulu, HI, USA, 12-13 Jun 2016. ISBN 9781509007264 (doi:10.1109/SNW.2016.7578049)

Moran, D.A.J. et al. (2007) High Performance Enhancement Mode III-V MOSFETs. IBM Workshop on Advanced Oxides, Zurich, Switzerland, June 2007.

Conference Proceedings

Al-Ameri, T. M. A. and Asenov, A. (2017) Vertically Stacked Lateral Si80Ge20 Nanowires Transistors for 5 nm CMOS Applications. In: Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS 2017), Athens, Greece, 3-5 Apr 2017, pp. 101-104. ISBN 9781509053131 (doi:10.1109/ULIS.2017.7962612)

Medina-Bailon, C., Sadi, T., Sampedro, C., Padilla, J.L., Godoy, A., Donetti, L., Georgiev, V. , Gamiz, F. and Asenov, A. (2017) Assessment of Gate Leakage Mechanism Utilizing Multi-Subband Ensemble Monte Carlo. In: 2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), Athens, Greece, 03-05 Apr 2017, pp. 144-147. ISBN 9781509053148 (doi:10.1109/ULIS.2017.7962585)

Zhang, Z., Zhang, Z., Guo, S., Wang, R., Wang, X., Cheng, B., Asenov, A. and Huang, R. (2017) Comparative Study on RTN Amplitude in Planar and FinFET Devices. In: IEEE Electron Devices Technology and Manufacturing Conference (EDTM 2017), Toyama, Japan, 28 Feb - 2 Mar 2017, pp. 109-110. ISBN 9781509046607 (doi:10.1109/EDTM.2017.7947530)

Lee, J. et al. (2017) Atoms-to-Circuits Simulation Investigation of CNT Interconnects for Next Generation CMOS Technology. In: SISPAD 2017: International Conference on Simulation of Semiconductor Processes and Devices, Kamakura, Japan, 7-9 Sept 2017, (Accepted for Publication)

Duan, M. et al. (2017) Interaction Between Hot Carrier Aging and PBTI Degradation in nMOSFETs: Characterization, Modelling and Lifetime Prediction. In: 2017 IEEE International Reliability Physics Symposium (IRPS), Monterey, CA, USA, 2-6 Apr 2017, XT5.1-XT5.7. (doi:10.1109/IRPS.2017.7936419)

Lee, J. et al. (2017) The Impact of Vacancy Defects on CNT Interconnects: From Statistical Atomistic Study to Circuit Simulations. In: SISPAD 2017: International Conference on Simulation of Semiconductor Processes and Devices, Kamakura, Japan, 7-9 Sept 2017, (Accepted for Publication)

Jiang, X., Guo, S., Wang, R., Wang, Y., Wang, X., Cheng, B., Asenov, A. and Huang, R. (2017) New Insights into the Near-Threshold Design in Nanoscale FinFET Technology for Sub-0.2V Applications. In: 2016 IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, USA, 03-07 Dec 2016, 28.4.1-28.4.4. ISBN 9781509039029 (doi:10.1109/IEDM.2016.7838499)

Zhang, Z., Zhang, Z., Wang, R., Jiang, X., Guo, S., Wang, Y., Wang, X., Cheng, B., Asenov, A. and Huang, R. (2017) New approach for understanding “random device physics” from channel percolation perspectives: Statistical simulations, key factors and experimental results. In: 2016 IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, USA, 03-07 Dec 2016, 7.2.1-7.2.4. ISBN 9781509039029 (doi:10.1109/IEDM.2016.7838366)

Sadi, T., Wang, L. and Asenov, A. (2017) Multi-Scale Electrothermal Simulation and Modelling of Resistive Random Access Memory Devices. In: 26th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2016), Bremen, Germany, 21-23 Sept 2016, pp. 33-37. ISBN 9781509007332 (doi:10.1109/PATMOS.2016.7833422)

Adamu-Lema, F., Duan, M. , Navarro, C., Georgiev, V. , Cheng, B., Wang, X., Millar, C., Gamiz, F. and Asenov, A. (2017) Simulation Based DC and Dynamic Behaviour Characterization of Z2FET. In: SISPAD 2017: International Conference on Simulation of Semiconductor Processes and Devices, Kamakura, Japan, 7-9 Sept 2017, (In Press)

Duan, M. , Adamu-Lema, F., Cheng, B., Navarro, C., Wang, X., Georgiev, V. , Gamiz, F., Millar, C. and Asenov, A. (2017) 2D-TCAD Simulation on Retention Time of Z2FET for DRAM Application. In: SISPAD 2017: International Conference on Simulation of Semiconductor Processes and Devices, Kamakura, Japan, 7-9 Sept 2017, (In Press)

Al-Ameri, T., Georgiev, V.P. , Lema, A., Sadi, T., Towie, E., Riddet, C., Alexander, C. and Asenov, A. (2016) Performance of Vertically Stacked Horizontal Si Nanowires Transistors: A 3D Monte Carlo / 2D Poisson Schrodinger Simulation Study. In: 2016 IEEE Nanotechnology Materials and Devices Conference (NMDC), Toulouse, France, 9-12 Oct 2016, ISBN 9781509043521 (doi:10.1109/NMDC.2016.7777117)

Georgiev, V. P. , Mirza, M. M., Dochioiu, A.-I., Lema, F.-A., Amoroso, S. M., Towie, E., Riddet, C., MacLaren, D. A., Asenov, A. and Paul, D. J. (2016) Experimental and Simulation Study of a High Current 1D Silicon Nanowire Transistor Using Heavily Doped Channels. In: 2016 IEEE Nanotechnology Materials and Devices Conference (NMDC), Toulouse, France, 9-12 Oct 2016, ISBN 9781509043521 (doi:10.1109/NMDC.2016.7777084)

Sadi, T., Towie, E., Nedjalkov, M., Riddet, C., Alexander, C., Wang, L., Georgiev, V. , Brown, A., Millar, C. and Asenov, A. (2016) One-Dimensional Multi-Subband Monte Carlo Simulation of Charge Transport in Si Nanowire Transistors. In: SISPAD 2016: International Conference on Simulation of Semiconductor Processes and Devices, Nuremberg, Germany, 6-8 Sept 2016, pp. 23-26. ISBN 9781509008186 (doi:10.1109/SISPAD.2016.7605139)

Al-Ameri, T., Georgiev, V. P. , Lema, F.-A., Sadi, T., Wang, X., Towie, E., Riddet, C., Alexander, C. and Asenov, A. (2016) Impact of Strain on the Performance of Si Nanowires Transistors at the Scaling Limit: A 3D Monte Carlo/2D Poisson Schrodinger Simulation Study. In: SISPAD 2016: International Conference on Simulation of Semiconductor Processes and Devices, Nuremberg, Germany, 6-8 Sept 2016, pp. 213-216. ISBN 9781509008186 (doi:10.1109/SISPAD.2016.7605185)

Zhang, Z., Zhang, Z., Guo, S., Wang, R., Wang, X., Cheng, B., Asenov, A. and Huang, R. (2016) Investigation on the Amplitude of Random Telegraph Noise (RTN) in Nanoscale MOSFETs: Scaling Limit of “Hole in the Inversion Layer” Model. In: 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Hangzhou, China, 25-28 Oct 2016, pp. 453-455. ISBN 9781467397193 (doi:10.1109/ICSICT.2016.7998949)

Al-Ameri, T., Georgiev, V. , Adamu-Lema, F. and Asenov, A. (2016) Influence of Quantum Confinement Effects and Device Electrostatic Driven Performance in Ultra-Scaled SixGe1-x Nanowire Transistors. In: 2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS 2016), Vienna, Austria, 25-27 Jan 2016, pp. 234-237. ISBN 9781467386104 (doi:10.1109/ULIS.2016.7440096)

Asenov, A., Wang, Y., Cheng, B., Wang, X., Asenov, P., Al-Ameri, T. and Georgiev, V.P. (2016) Nanowire transistor solutions for 5nm and beyond. In: 2016 17th International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, USA, 15-16 Mar 2016, pp. 269-274. (doi:10.1109/ISQED.2016.7479212)

Sadi, T., Wang, L., Gao, D., Mehonic, A., Montesi, L., Buckwell, M., Kenyon, A., Shluger, A. and Asenov, A. (2016) Advanced physical modeling of SiOx resistive random access memories. In: International Conference on Simulation of Semiconductor Processes and Devices, Nuremberg, Germany, 06-08 Sep 2016, pp. 149-152. ISBN 9781509008186 (doi:10.1109/SISPAD.2016.7605169)

Wang, L., Sadi, T., Brown, A.R., Nedjalkov, M., Alexander, C., Cheng, B., Millar, C. and Asenov, A. (2016) Simulation Analysis of the Electro-Thermal Performance of SOI FinFETs. In: Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS 2016), Vienna, Austria, 25-27 Jan 2016, pp. 56-59. ISBN 9781467386098 (doi:10.1109/ULIS.2016.7440051)

Donetti, L., Sampedro, C., Gamiz, F., Godoy, A., Garcıa-Ruız, F. J., Towie, E., Georgiev, V. , Amoroso, S. M., Riddet, C. and Asenov, A. (2015) Multi-Subband Ensemble Monte Carlo Simulation of Si Nanowire MOSFETs. In: SISPAD: International Conference on Semiconductor Process and Device Simulations, Washington, DC, USA, 9-11 Sept 2015, pp. 353-356. ISBN 9781467378581 (doi:10.1109/SISPAD.2015.7292332)

Georgiev, V. P. , Amoroso, S. M., Gerrer, L., Adamu-Lema, F. and Asenov, A. (2015) Interplay between quantum mechanical effects and a discrete trap position in ultrascaled FinFETs. In: SISPAD 2015: International Conference on Semiconductor Process and Device Simulations, Washington, DC, USA, 9-11 Sept 2015, pp. 246-249. ISBN 9781467378581 (doi:10.1109/SISPAD.2015.7292305)

Adamu-Lema, F., Wang, X., Amoroso, S.M., Gerrer, L., Millar, C. and Asenov, A. (2015) Comprehensive 'Atomistic' Simulation of Statistical Variability and Reliability in 14 nm Generation FinFETs. In: 20th International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Washington D.C.,USA, 09-11 Sep 2015, pp. 157-160. ISBN 9781467378598

Al-Ameri, T., Wang, Y., Georgiev, V.P., Adamu-Lema, F., Wang, X. and Asenov, A. (2015) Correlation between Gate Length, Geometry and Electrostatic Driven Performance in Ultra-Scaled Silicon Nanowire Transistors. In: 10th IEEE Nanotechnology Materials and Devices Conference (NMDC), Anchorage, AK, USA, 13-16 Sep 2015, pp. 30-34. ISBN 9781467393621 (doi:10.1109/NMDC.2015.7439240)

Jiang, X., Wang, X., Wang, R., Cheng, B., Asenov, A. and Huang, R. (2015) Predictive Compact Modeling of Random Variations in FinFET Technology for 16/14nm Node and Beyond. In: International Electron Devices Meeting (IEDM), Washington, D.C., USA, 7-9 Dec 2015, 28.3.1-28.3.4. ISBN 9781467398947 (doi:10.1109/IEDM.2015.7409787)

Sadi, T., Wang, L., Gerrer, L. and Asenov, A. (2015) Physical Simulation of Si-Based Resistive Random-Access Memory Devices. In: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Washington, DC, USA, 9-11 Sep 2015, pp. 385-388. ISBN 9781467378581 (doi:10.1109/SISPAD.2015.7292340)

Sadi, T., Wang, L., Gerrer, L., Georgiev, V. and Asenov, A. (2015) Self-consistent physical modeling of SiOx-based RRAM structures. In: International Workshop on Computational Electronics (IWCE), West Lafayette, IN, USA, 2-4 Sep 2015, pp. 1-4. ISBN 978069251523515 (doi:10.1109/IWCE.2015.7301981)

Wang, J., Xiaobo, J., Wang, X., Wang, R., Cheng, B., Asenov, A., Wei, L. and Huang, R. (2015) Variation-Aware Energy-Delay Optimization Method for Device/Circuit Co-Design. In: China Semiconductor Technology International Conference (CSTIC), Shanghai, China, 15-16 Mar 2015, pp. 1-3. ISBN 9781479972418 (doi:10.1109/CSTIC.2015.7153331)

Wang, L., Sadi, T., Nedjalkov, M., Brown, A.R., Alexander, C., Cheng, B., Millar, C. and Asenov, A. (2015) An Advanced Electro-Thermal Simulation Methodology for Nanoscale Device. In: International Workshop on Computational Electronics (IWCE), West Lafayette, USA, 2-4 Sep 2015, pp. 1-4. (doi:10.1109/IWCE.2015.7301989)

Wang, X., Reid, D., Wang, L., Burenkov, A., Millar, C., Lorenz, J. and Asenov, A. (2015) Hierarchical Variability-Aware Compact Models of 20nm Bulk CMOS. In: 20th International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Washington D.C.,USA, 09-11 Sep 2015, pp. 325-328. ISBN 9781467378598

Wang, X., Wang, Y., Towie, E., Cheng, B., Liu, X. and Asenov, A. (2015) Discrete Dopant Impact on the 7 nm Nanowire Transistor Performance. In: 2015 International Conference on Solid State Devices and Materials (SSDM), Sapporo, Japan, 27-30 Sept 2015, pp. 84-85. (Unpublished)

Georgiev, V., Amoroso, S. and Asenov, A. (2014) 3D Multi-Subband Ensemble Monte Carlo Simulator of FinFETs and nanowire transistors. In: 2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Yokohama, Japan, 9-11 Sep 2014,

Wang, X., Reid, D., Wang, L., Burenkov, A., Millar, C., Cheng, B., Lange, A., Lorenz, J., Baer, E. and Asenov, A. (2014) Variability-aware compact model strategy for 20-nm bulk MOSFETs. In: 19th International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Yokohama Japan, 8-11 Sep 2014, pp. 293-296. ISBN 9781479952878

Adamu-Lema, F., Amoroso, S.M., Wang, X., Cheng, B., Shifren, L., Aitken, R., Sinha, S., Yeric, G. and Asenov, A. (2014) The discrepancy between the uniform and variability aware atomistic TCAD simulations of decananometer bulk MOSFETs and FinFETs. In: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Yokohama, 9-11 Sept. 2014, pp. 285-288. ISBN 9781479952878 (doi:10.1109/SISPAD.2014.6931619)

Amoroso, S., Georgiev, V., Towie, E., Riddet, C. and Asenov, A. (2014) Metamorphosis of a nanowire: a 3-D coupled mode space NEGF study. In: 2014 International Workshop on Computational Electronics (IWCE), Paris, France, 3-6 June 2014, pp. 1-4. (doi:10.1109/IWCE.2014.6865854)

Asenov, A., Cheng, B., Adamu-Lema, F., Shifren, L., Sinha, S., Ridet, C., Alexander, C. L., Brown, A. R., Wang, X. and Amoroso, S. M. (2014) Predictive simulation of future CMOS technologies and their impact on circuits. In: 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology (ICSICT 2014), Guilin, China, 28-31 Oct. 2014, pp. 1411-1414.

Georgiev, V. P., Amoroso, S. M., Vila-Nadal, L. , Busche, C., Cronin, L. and Asenov, A. (2014) FDSOI Molecular Flash Cell with Reduced Variability for Low Power Flash Applications. In: 44th European Solid-State Device Research Conference (ESSDERC), Venice, Italy, 22-26 Sep 2014, pp. 353-356. ISBN 9781479943760 (doi:10.1109/ESSDERC.2014.6948833)

Wang, L., Brown, A.R., Nedjalkov, M., Alexander, C., Cheng, B., Millar, C. and Asenov, A. (2014) 3D coupled electro-thermal FinFET simulations including the fin shape dependence of the thermal conductivity. In: 2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2014), Yokohama, Japan, 9-11 Sept. 2014, pp. 269-272. (doi:10.1109/SISPAD.2014.6931615)

Wang, L., Brown, A.R., Nedjalkov, M., Alexander, C., Cheng, B., Millar, C. and Asenov, A. (2014) 3D coupled electro-thermal simulations for SOI FinFET with statistical variations including the fin shape dependence of the thermal conductivity. In: 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology (ICSICT 2014), Guilin, China, 28-31 Oct 2014,

Wang, L., Brown, A., Cheng, B. and Asenov, A. (2014) Simulation of 3D FinFET doping profiles introduced by ion implantation and the impact on device performance. In: The 20th International Conference on Ion Implantation Technology (IIT 2014), Portland, OR, USA, 26 June - 4 July 2014, pp. 1-4. (doi:10.1109/IIT.2014.6940008)

Wang, L., Brown, A. R., Millar, C., Burenkov, A., Wang, X., Asenov, A. and Lorenz, J. (2014) Simulation for statistical variability in realistic 20nm MOSFET. In: 15th International Conference On Ultimate Integration On Silicon (ULIS2014), Stockholm, Sweden, 7-9 April 2014, pp. 5-8. (doi:10.1109/ULIS.2014.6813892)

Wang, X., Cheng, B., Brown, A.R., Millar, C. and Asenov, A. (2014) Accurate simulations of the interplay between process and statistical variability for nanoscale FinFET-based SRAM cell stability. In: 44th European Solid-State Device Research Conference (ESSDERC), Venice, Italy, 22-26 Sep 2014, pp. 349-352. ISBN 9781479943760

Wang, X., Cheng, B., Millar, C., Reid, D. and Asenov, A. (2014) Statistical aspects of FinFET based SRAM metrics subject to process and statistical variability. In: 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology (ICSICT 2014), Guilin, China, 28-31 Oct 2014, pp. 702-704.

Wang, X., Cheng, B., Brown, A., Millar, C., Kuang, J.B., Nassif, S. and Asenov, A. (2013) Impact of statistical variability and charge trapping on 14 nm SOI finFET SRAM cell stability. In: 43rd European Solid-State Device Research Conference (ESSDERC), Bucharest, Romania, 16-20 Sep 2013, pp. 234-237. (doi:10.1109/ESSDERC.2013.6818862)

Asenov, A., Cheng, B., Wang, X., Brown, A.R., Reid, D., Millar, C. and Alexander, C. (2013) Simulation based transistor-SRAM co-design in the presence of statistical variability and reliability. In: IEEE International Electron Devices Meeting (IEDM), Washington, D.C., USA, 9-11 Dec 2013, pp. 818-821.

Cheng, B., Wang, X., Brown, A.R., Kuang, J.B., Reid, D., Millar, C., Nassif, S. and Asenov, A. (2013) SRAM device and cell co-design considerations in a 14nm SOI FinFET technology. In: 2013 IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, China, 19-23 May 2013, pp. 2339-2342. (doi:10.1109/ISCAS.2013.6572347)

Georgiev, V. P. , Markov, S., Vilà-Nadal, L. , Asenov, A. and Cronin, L. (2013) Molecular-Metal-Oxide-nanoelectronicS (M-MOS): Achieving the Molecular Limit. In: 16th International Workshop on Computational Electronics, Nara, Japan, 4-7 June 2013, ISBN 9783901578267

Georgiev, V. P., Markov, S., Vila-Nadal, L. , Busche, C., Cronin, L. and Asenov, A. (2013) Multi-scale computational framework for the evaluation of variability in the programing window of a flash cell with molecular storage. In: 2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC), Bucharest, Romania, 16-20 Sep 2013, pp. 230-233. (doi:10.1109/ESSDERC.2013.6818861)

Georgiev, V. P. , Towie, E. A. and Asenov, A. (2013) Interaction Between Precisely Placed Dopants and Interface Roughness in Silicon Nanowire Transistors: Full 3-D NEGF Simulation Study. In: 2013 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2013), Glasgow, Scotland, 3-5 Sep 2013, pp. 416-419. ISBN 9781467357333 (doi:10.1109/SISPAD.2013.6650663)

Wang, X., Cheng, B., Brown, A.R., Millar, C., Alexander, C., Reid, D., Kuang, J.B., Nassif, S. and Asenov, A. (2013) Unified compact modelling strategies for process and statistical variability in 14-nm node DG FinFETs. In: 18th International Conference on Simulation of Semiconductor Processes and Devices: SISPAD 2013, Glasgow, UK, 3-5 Sep 2013, pp. 139-142.

Cheng, B., Wang, X., Brown, A.R., Millar, C. and Asenov, A. (2012) Statistical TCAD based PDK development for a FinFET technology at 14nm technology node. In: SISPAD 2012, Denver, CO, USA, 5-7 Sep 2012, pp. 113-116. ISBN 9780615717562

Cheng, B., Brown, A. R., Wang, X. and Asenov, A. (2012) Statistical variability study of a 10nm gate length SOI FinFET device. In: IEEE: Silicon Nanoelectronics Workshop (SNW), Honolulu, HI, USA, 10-11 Jun 2012, pp. 1-2. ISBN 9781467309967 (doi:10.1109/SNW.2012.6243343)

Towie, E., Liao, S.-Y., Riddet, C. and Asenov, A. (2012) InGaAs implant-free quantum-well MOSFETs: performance evaluation using 3D Monte Carlo simulation. In: Intel European Research and Innovation Conference, Dublin, Ireland, 3-5 Oct 2012,

Wang, L., Brown, A. R., Cheng, B. and Asenov, A. (2012) Simulation of 3D FinFET doping profiles by ion implantation. In: 19th International Conference on Ion Implantation Technology, Valladolid, Spain, 25-29 June 2012, pp. 217-220. (doi:10.1063/1.4766527)

Wang, X., Brown, A., Cheng, B. and Asenov, A. (2012) RTS amplitude distribution in 20nm SOI finFETs subject to statistical variability. In: SISPAD: International Conference on Semiconductor Process and Device Simulations, Denver, CO, USA, 5-7 Sep 2012, pp. 296-299.

Wang, X., Brown, A., Cheng, B. and Asenov, A. (2012) Statistical distribution of RTS amplitudes in 20nm SOI FinFETs. In: Silicon Nanoelectronics Workshop (SNW 2012), Honolulu, HI, USA, 10-11 Jun 2012, (doi:10.1109/SNW.2012.6243347)

Wang, X., Cheng, B., Brown, A.R., Miller, C. and Asenov, A. (2012) Statistical variability in 14-nm node SOI FinFETs and its impact on corresponding 6T-SRAM cell design. In: ESSDERC2012: European Solid-State Device Research Conference 2012, Bordeaux, France, 17-21 Sep 2012, pp. 113-116. (doi:10.1109/ESSDERC.2012.6343346)

Watling, J.R., Riddet, C. and Asenov, A. (2012) Accurate and efficient modelling of inelastic hole-acoustic phonon scattering in Monte Carlo simulations. In: 15th International Workshop on Computational Electronics (IWCE), Madison, WI, USA, 22-25 May 2012, pp. 1-4. (doi:10.1109/IWCE.2012.6242866)

Towie, E., Chan, K.-H., Benbakhti, B., Riddet, C. and Asenov, A. (2011) Statistical variability in implant-free quantum-well MOSFETs with InGaAs and Ge: a comparative 3D simulation study. In: Intel European Research and Innovation Conference, Dublin, Ireland, 12-14 Mar 2011,

Amoroso, S.M., Alexander, C.L., Markov, S., Roy, G. and Asenov, A. (2011) A mobility model correction for 'atomistic' drift-diffusion simulation. In: 2011 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Osaka, Japan, 8-10 Sep 2011, pp. 279-282. ISBN 9781612844190 (doi:10.1109/SISPAD.2011.6035023)

Asenov, P., Adamu-Lema, F., Roy, S., Millar, C., Asenov, A., Roy, G., Kovac, U. and Reid, D. (2011) The effect of compact modelling strategy on SNM and Read Current variability in Modern SRAM. In: 2011 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Osaka, Japan, 8-10 Sep 2011, pp. 283-286. ISBN 9781612844190 (doi:10.1109/SISPAD.2011.6035024)

Aymerich, N. et al. (2011) New reliability mechanisms in memory design for sub-22nm technologies. In: IEEE 17th International On-Line Testing Symposium (IOLTS), Athens, Greece, 13-15 Jul 2011, pp. 111-114. ISBN 9781457710537 (doi:10.1109/IOLTS.2011.5993820)

Markov, S., Idris, N.M. and Asenov, A. (2011) Statistical variability in n-channel UTB-FD-SOI MOSFETs under the influence of RDF, LER, MGG and PBTI. In: 2011 IEEE International SOI Conference, Tempe, AZ, 3-6 Oct 2011, pp. 1-2. (doi:10.1109/SOI.2011.6081680)

Wang, X., Brown, A.R., Cheng, B. and Asenov, A. (2011) Statistical variability and reliability in nanoscale FinFETs. In: IEEE International Electron Devices Meeting (IEDM), Washington DC, USA, 5-7 Dec 2011, 5.4.1-5.4.4. (doi:10.1109/IEDM.2011.6131494)

Aldegunde, M., Martinez, A. and Asenov, A. (2010) Impact of scattering on the performance of a Si GAA Nanowire FET: from diffusive to ballistic regime. In: 14th International Workshop on Computational Electronics (IWCE), Pisa, Italy, 27-29 Oct 2010,

Asenov, A. (2010) Advanced Monte Carlo Techniques in the Simulation of CMOS Devices and Circuits. In: Numerical Methods and Applications 7th International Conference, Borovets, Bulgaria, 20-24 Aug 2010,

Asenov, A. and Cheng, B. (2010) Modeling and Simulation of Statistical Variability in Nanometer CMOS Technologies. In: 19th Workshop on Advances in Analog Circuit Design, Graz University of Technology,

Asenov, A., Cheng, B., Dideban, D., Kovac, U., Moezi, N., Millar, C., Roy, G., Brown, A. and Roy, S. (2010) Modeling and simulation of transistor and circuit variability and Reliability. In: Custom Integrated Circuit Conference (CICC), San Jose, CA, USA, 19-22 September 2010, pp. 1-8. (doi:10.1109/CICC.2010.5617627)

Asenov, P., Kamsani, N.A., Reid, D., Millar, C., Roy, S. and Asenov, A. (2010) Combining Process and Statistical Variability in the Evaluation of the Effectiveness of Corners in Digital Circuit Parametric Yield Analysis. In: ESSDERC 2010, Sevilla, 13-17 September,

Asenov, P., Reid, D., Millar, C., Roy, S., Liu, Z., Furber, S. and Asenov, A. (2010) Generic Aspects of Digital Circuit Behaviour In the Presence of Statistical Variability. In: VARI 2010,

Benbakhti, B., Kalna, K., Chan, K.H., Hellings, G., Eneman, G., De Meyer, K., Meuris, M. and Asenov, A. (2010) Design and Analysis of a New In53Ga47As Implant-Free Quantum-Well Device Structure. In: European Materials Research Society (EMRS), Spring Meeting, Strasbourg,

Benbakhti, B., Kalna, K., Wang, X., Cheng, B., Hellings, G., Eneman, G., De Meyer, K., Meuris, M. and Asenov, A. (2010) Impact of Raised Source/Drain in the In53Ga47As Channel Implant-Free Quantum-Well Transistor. In: 11th International Conference on Ultimate Integration Silicon (ULIS), Glasgow, UK, 2010, p. 129.

Benbakhti, B., Towie, E., Kalna, K., Hellings, G., Eneman, G., De Meyer, K., Meuris, M. and Asenov, A. (2010) Monte Carlo Analysis of In0.53Ga0.47As implant-free Qqantum-well device performance. In: 2010 Silicon Nanoelectronics Workshop, Hilton Hawaiian Village, Honolulu, Hawaii, 13-14 June 2010,

Chan, K.H., Riddet, C., Benbakhti, B., Watling, J. and Asenov, A. (2010) Simulation and Optimization of Implant-Free Quantum Well Germanium p-MOSFET Design. In: European Materials Research Society (EMRS), Spring Meeting, Strasbourg,

Cheng, B., Dideban, D., Moezi, N., Millar, C., Roy, G., Wang, X., Roy, S. and Asenov, A. (2010) Capturing intrinsic parameter fluctuations using the PSP compact model. In: Proceedings of the Conference on Design, Automation and Test in Europe (DATE 2010), Dresden, Germany, 8-12 March 2010, pp. 650-653.

Cheng, B., Moezi, N., Dideban, D., Millar, C., Roy, S. and Asenov, A. (2010) Impact of Statistical Parameter set Selection on Accuracy of Statistical Compact Modelling. In: MOS-AK Workshop, Sapienza University, Rome, Italy, 8-9 April 2010,

Dideban, D., Cheng, B., Moezi, N., Kamsani, N.A., Millar, C., Roy, S. and Asenov, A. (2010) Impact of input slew rate on statistical timing and power dissipation variability in nanoCMOS. In: 11th International Conference on Ultimate Integration on Silicon, Glasgow, Scotland, 17-19 Mar 2010,

Dideban, D., Cheng, B., Moezi, N., Wang, X. and Asenov, A. (2010) Evaluation of 35nm MOSFET capacitance components in PSP compact model. In: 18th Iranian Conference on Electrical Engineering (ICEE), 2010, Isfahan, Iran, 11-13 May 2010, (doi:10.1109/IRANIANCEE.2010.5507045)

Garcia-Loureiro, A., Aldegunde, M., Seoane, N., Kalna, K. and Asenov, A. (2010) Impact of Random Dopant Fluctuations on a Tri-Gate MOSFET. In: 11th International Conference on Ultimate Integration on Silicon, 18-19 March 2010, p. 77.

Idris, N.M., Brown, A., Watling, J. and Asenov, A. (2010) Simulation Study of Workfunction Variability in MOSFETs with Polycrystalline Metal Gates. In: 11th International Conference on Ultimate Integration Silicon (ULIS), Glasgow, UK,

Kamsani, N.A., Cheng, B., Millar, C., Moezi, N., Wang, X., Roy, S. and Asenov, A. (2010) Impact of slew rate definition on the accuracy of nanoCMOS inverter timing simulations. In: 11th International Conference on Ultimate Integration on Silicon, Glasgow, Scotland, 17-19 Mar 2010, p. 53.

Kovac, U., Alexander, C. and Asenov, A. (2010) Statistical Estimation of Electrostatic and Transport Contributions to device Parameter Variation. In: 14th International Workshop on Computational Electronics, 27-29 October 2010,

Kovac, U., Alexander, C., Roy, G., Cheng, B. and Asenov, A. (2010) Compact Model Extraction from Quantum Corrected Statistical Monte Carlo Simulation of Random Dopant Induced Drain Current Variability. In: 8th International Conference on Advanced Semiconductor Devices and Microsystems, 25-27 Oct 2010, pp. 317-320. (In Press)

Kovac, U., Dideban, D., Cheng, B., Moezi, N., Roy, G. and Asenov, A. (2010) A novel approach to the statistical generation of non-normal distributed PSP compact model parameters using a nonlinear power method. In: 15th International Conference on Simulation of Semiconductor Preocesses and Devices (SISPAD), Bologna, Italy, 6-8 Sep 2010,

Martinez, A.,, Seoane, N., Brown, A. and Asenov, A. (2010) A detailed 3D-NEGF simulation study of tunneling in a n-Si nanowire MOSFETs. In: 2010 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, 13-14 June 2010,

Martinez, A., Aldegunde, M. and Asenov, A. (2010) Channel length dependence of discrete dopant effects in narrow si nanowire transistors: A full 3D NEGF study. In: 14th International Workshop on Computational Electronics (IWCE), Pisa, Italy, 27-29 Oct 2010,

Martinez, A., Benbakhti, B. and Asenov, A. (2010) Effect of the channel thickness on the performance of the implant-free quantum-well MOSFET. In: 14th International Workshop on Computational Electronics, Pisa, Italy, 27-29 Oct 2010,

Moore, I., Millar, C., Roy, S. and Asenov, A. (2010) Brownian noise in FET based nano-pore sensing a 3D simulation study. In: 14th International Workshop on Computational Electronics, Pisa, Italy, 27-29 Oct 2010,

Moore, I., Millar, C., Roy, S. and Asenov, A. (2010) Integrating drift diffusion and Brownian simulations for sensory applications. In: 11th International Conference on Ultimate Integration on Silicon, Glasgow, UK, 17-19 Mar 2010, pp. 85-88.

Riddet, C., Watling, J., Chan, K. and Asenov, A. (2010) Monte carlo simulation study of the impact of strain and substrate orientation on hole mobility on Geranium. In: 14th International Workshop on Computational Electronics (IWCE), Pisa, Italy, 27-29 Oct 2010, pp. 239-242.

Riddet, C., Watling, J., Chan, K.H., Asenov, A., De Jaeger, B., Mitard, J. and Meuris, M. (2010) Monte Carlo Simulation Study of Hole Mobility in Germanium MOS Inversion Layers. In: 14 International Workshop on Computational Electronics, Pisa, Italy, 26-29 October 2010, pp. 239-242. (doi:10.1109/IWCE.2010.5677972)

Tang, T.B., Murray, A.F., Cheng, B. and Asenov, A. (2010) Statistical NBTI-effect prediction for ULSI circuits. In: IEEE International Symposium on Circuits and Systems, Paris, France, 30 May - 2 Jun 2010, pp. 2494-2497. (doi:10.1109/ISCAS.2010.5537132)

Watling, J., Riddet, C., Chan, K. and Asenov, A. (2010) Simulation of hole-mobility in doped relaxed and strained Ge layers. In: European Materials Research Society (EMRS), Spring Meeting, Strasbourg, 2010,

Davenhall, C., Harbulot, B., Jones, M., Stewart, G., Sinnott, R.O., Asenov, A., Millar, C., Roy, G. and Reid, D. (2009) Data management of nanometre­ scale CMOS device simulations. In: 5th International Digital Curation Conference, London, UK, 2-4 Dec 2009,

Hill, R.J.W. et al. (2009) Deep sub-micron and self-aligned flatband III–V MOSFETs. In: Device Research Conference, 2009 (DRC 2009), University Park, PA, USA, 22-24 Jun 2009, pp. 251-252. (doi:10.1109/DRC.2009.5354900)

Alexander, C., Kovac, U., Roy, G., Roy, S. and Asenov, A. (2009) A unified density gradient approach to 'ab-initio' ionized impurity scattering in 3D MC simulations of nano-CMOS variability. In: Ultimate Integration of Silicon: ULIS 2009, Aachen, Germany, 18-20 Mar 2009, pp. 43-46. (doi:10.1109/ULIS.2009.4897535)

Bukhori, M.F., Roy, S. and Asenov, A. (2009) Simulation of statistical aspects of reliability in nano CMOS. In: IEEE International Integrated Reliability Workshop (IRW '09), S. Lake Tahoe, CA., U.S.A., 18-22 Oct 2009, pp. 82-85. ISBN 9781424439218 (doi:10.1109/IRWS.2009.5383028)

Cheng, B., Moezi, N., Dideban, D., Roy, G., Roy, S. and Asenov, A. (2009) Benchmarking the Accuracy of PCA Generated Statistical Compact Model Parameters Against Physical Device Simulation and Directly Extracted Statistical Parameters. In: Simulation of Semiconductor Processes and Devices, 2009, San Diego, CA, 9-11th September, 2009, pp. 1-4. ISBN 1946-1569 (doi:10.1109/SISPAD.2009.5290230)

Kamsani, N.A., Cheng, B.J., Roy, S. and Asenov, A. (2009) Impact of Random Dopant Induced Statistical Variability on Inverter Switching Trajectories and Timing Variability. In: ISCAS: IEEE International Symposium on Circuits and Systems, 2009, pp. 577-580.

Martinez, A., Brown, A., Seoane, N. and Asenov, A. (2009) Investigation of resistance in n-doped Si wires using NEGF formalism. In: Spanish Conference on Electron Devices (CDE 2009), Santiago de Compostela, Spain, 11-13 Feb 2009, pp. 416-419. ISBN 9781424428380 (doi:10.1109/SCED.2009.4800522)

Martinez, A., Brown, A.R., Asenov, A. and Seoane, N. (2009) A comparison between a fully-3D real-space versus coupled mode-space NEGF in the study of variability in gate-all-around Si nanowire MOSFET. In: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2009), San Diego, California, 9-11 September 2009, pp. 194-197.

Martinez, A., Kalna, K. and Asenov, A. (2009) Impurity potential induced resonances in Doped Si nanowire: A NEGF approach. In: 9th IEEE Conference on Nanotechnology, 2009. IEEE-NANO 2009, Genoa, Italy, 26-30 Jul 2009, pp. 551-554. ISBN 9781424448326

Reid, D., Millar, C., Roy, G., Roy, S. and Asenov, A. (2009) Efficient simulation of 6σ VT distribution due to random descrete dopants. In: 10th International Conference on Ultimate Integration of Silicon, 2009. ULIS 2009., Aachen, Germany, 18-20 Mar 2009, pp. 23-26. (doi:10.1109/ULIS.2009.4897530)

Reid, D., Millar, C., Roy, G., Roy, S. and Asenov, A. (2009) Understanding LER-induced statistical variability: a 35,000 sample 3D simulation study. In: European Solid State Device Research Conference, 2009. ESSDERC '09, Athens, Greece, 14-18 Sep 2009, pp. 423-426. (doi:10.1109/ESSDERC.2009.5331515)

Seoane, N., Martinez, A., Brown, A. and Asenov, A. (2009) Study of surface roughness in extremely small Si nanowire MOSFETs using fully-3D NEGFs. In: Spanish Conference on Electron Devices, 2009. CDE 2009., Santiago de Compostela, Spain, 11-13 Feb 2009, pp. 180-183. ISBN 9781424428380 (doi:10.1109/SCED.2009.4800460)

Twaddle, F., Cumming, D., Roy, S., Asenov, A. and Drysdale, T. (2009) Variability of short-range interconnects. In: 13th International Workshop on Computational Electronics, Beijing, China, 27-29 May 2009,

Twaddle, F.J., Cumming, D.R.S., Roy, S., Asenov, A. and Drysdale, T.D. (2009) RC variability of short-range interconnects. In: IWCE 2009: 13th International Workshop on Computational Electronics, Beijing, China, 27-29 May 2009, pp. 121-124. (doi:10.1109/IWCE.2009.5091143)

Wang, X.S., Roy, S. and Asenov, A. (2009) Impact of strain on the performance of high-k/metal replacement gate MOSFETs. In: 10th International Conference on Ultimate Integration of Silicon, Aachen, Germany, 18-20 March 2009, pp. 289-292. (doi:10.1109/ULIS.2009.4897592)

Hill, R., Moran, D., Li, X., Macintyre, D.S., Thoms, S., Asenov, A., Droopad, R., Passlack, M. and Thayne, I. (2008) III-V MOSFETs: a possible solution for sub-22 nm CMOS nFETs. In: 17th European Heterostructure Technology Workshop, Venice, Italy, Nov 2008,

Sinnott, R.O. et al. (2008) Scalable, security-oriented solutions for nanoCMOS electronics. In: UK e-Science All Hands Meeting, Edinburgh, UK, 8-11 Sept 2008,

Harbulot, B., Berry, D., Davenhall, C., Jones, M., Millar, C., Roy, G., Sinnott, R.O., Stewart, G. and Asenov, A. (2008) A resource-oriented data management architecture for nanoCMOS electronics. In: UK e-Science All Hands Meeting, Edinburgh, UK, 8-11 Sept 2008,

Asenov, A. (2008) Impact of the field induced polarization space-charge on the characteristics of AlGaN/GaN HEMT: self-consistent simulation study - Invited. In: 14th IEEE International Symposium on Asynchronous Circuits and Systems ASYNC 2008, Newcastle, UK, 7-11th April, 2008, xv.

Asenov, A. (2008) Statistical device variability and its impact on low power digital circuit design. In: Proceeding FTFC 2008, Louvain La Neuve, Belgium, 27-28 May 2008, pp. 29-34.

Asenov, A. et al. (2008) Advanced simulation of statistical variability and reliability in nano CMOS transistors. In: IEDM 2008. IEEE International Electron Devices Meeting, 2008, San Francisco, CA, 15-17 Dec 2008, p. 421. ISBN 9781424423774 (doi:10.1109/IEDM.2008.4796712)

Asenov, A. et al. (2008) Meeting the design challenges of nano-CMOS electronics, design automation and test in Europe. In: Workshop on Impact of Process Variability on Design and Test, Munich, Germany, 10-14 Mar 2008,

Balaz, D., Kalna, K., Kuball, M., Uren, M. and Asenov, A. (2008) Impact of the Field Induced Polarization Space-Charge on the Characteristics of AlGaN/GaN HEMT: Self-Consistent Simulation Study. In: International Workshop On Nitride Semiconductors, Montreux, Switzerland, Oct. 6-10, 2008, We7-C4.

Bindu, B., Cheng, B., Roy, G., Wang, X., Roy, S. and Asenov, A. (2008) An efficient data sampling strategy for statistical parameter extraction of nano-MOSFETs. In: IEEE Workshop on Compact Modeling, Hakone, Japan, 8 Sept 2008,

Bukhori, M. F., Roy, S. and Asenov, A. (2008) Statistical simulation of RTS amplitude distribution in realistic bulk MOSFETs subject to random discreet dopants. In: 9th International Conference on Ultimate Integration of Silicon, 2008. ULIS 2008., Udine, Italy, pp. 171-174. ISBN 978-1-4244-1729-2 (doi:10.1109/ULIS.2008.4527166)

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Kamsani, N.A., Cheng, B., Roy, S. and Asenov, A. (2008) Statistical circuit simulation with supply-voltage scaling in nanometre MOSFET devices under the influence of random dopant fluctuations. In: Faible Tension Faible Consommation (FTFC) 2008, Louvain La Neuve, Belgium, 26-28 May 2008, pp. 95-99.

Kamsani, N.A., Cheng, B., Roy, S. and Asenov, A. (2008) Statistical circuit simulation with the effect of random discrete dopants in nanometer MOSFET devices. In: Design Automation and Test in Europe: Workshop W2, Impact of Process Variability on Design and Test, Munich, Germany, 10-14 March 2008,

Markov, S., Roy, S., Fiegna, C., Sangiorgi, E. and Asenov, A. (2008) On the sub-nm EOT scaling of high-kappa gate stacks. In: International Conference on the Ultimate Integration of Silicon, Udine, Italy, 13-14 Mar 2008,

Martinez, A., Barker, J.R., Brown, A., Asenov, A. and Seoane, N. (2008) Simulation of impurities with an attractive potential in fully 3-D real-space Non-Equilibrium Green's Function quantum transport simulations. In: nternational Conference on Simulation of Semiconductor Processes and Devices, 2008, Hakone, Japan, 9-11 Sept 2008, pp. 341-344. (doi:10.1109/SISPAD.2008.4648307)

Reid, D., Millar, C., Asenov, A., Roy, S., Roy, G., Sinnott, R.O. and Stewart, G. (2008) Supporting statistical semiconductor device analysis using EGEE and OMII-UK middleware. In: EGEE User Conference, Clermond Ferrand, France, Feb 2008,

Reid, D., Sinnott, R.O., Millar, C., Roy, G., Roy, S., Stewart, G., Stewart, G. and Asenov, A. (2008) Enabling cutting-edge semiconductor simulation through grid technology. In: UK e-Science All Hands Meeting, Edinburgh, UK, 8-11 Sep 2008,

Riddet, C. and Asenov, A. (2008) Convergence properties of density gradient quantum corrections in 3D ensemble Monte Carlo simulations. In: International Conference on Simulation of Semiconductor Processes and Devices, 2008. SISPAD 2008, Hakone, Japan, 9-11 Sept. 2008, pp. 261-264. (doi:10.1109/SISPAD.2008.4648287)

Sinnott, R.O., Berry, D., Harbulot, B., Millar, C., Reid, D., Roy, G., Roy, S., Stewart, G. and Asenov, A. (2008) Meeting the design challenges of nanoCMOS electronics through secure large-scale simulation and data management. In: EGEE'08, Istanbul, Turkey, 22-26 Sep 2008,

Wang, X., Cheng, B., Roy, S. and Asenov, A. (2008) Simulation of strain enhanced variability in nMOSFETs. In: 9th International Conference on Ultimate Integration of Silicon, 2008. ULIS 2008., Udine, Italy, 12-14 March 2008, pp. 89-92. (doi:10.1109/ULIS.2008.4527147)

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Han, L., Asenov, A., Berry, D., Millar, C., Roy, G., Roy, S., Sinnott, R.O. and Stewart, G. (2007) Towards a grid-enabled simulation framework for nano-CMOS electronics. In: 3rd IEEE International Conference on e-Science and Grid Computing, Bangalore, India, 10-13 Dec 2007, pp. 305-311. (doi:10.1109/E-SCIENCE.2007.78)

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Thayne, I.G. et al. (2007) Recent Progress in III-V MOSFETs. In: UK Condensed Matter and Material Physics Conference, Leicester, UK, April 2007,

Alexander, C., Roy, G. and Asenov, A. (2006) Increased intrinsic parameter fluctuations through ab initio Monte Carlo simulations in nano-scaled MOSFETs. In: International Electron Devices Meeting 2006, IEDM, San Fransisco, CA, USA,

Asenov, A. (2006) A 3D finite element parallel simulator for studying fluctuations in advanced MOSFETs. In: 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, p. 37.

Asenov, A., Brown, A., Roy, G., Alexander, C. and Martinez, A. (2006) Simulation of Atomic Scale Effects and Fluctuations in nano-scale CMOS. In: International Conference on Solid State Devices and Materials. (SSDM 2006)., Yokohama,Japan,

Asenov, A. and Samsudin, K. (2006) Variability in nanoscale SOI devices and its impact on circuits and systems. In: Nano Scaled Semiconductor-on-Insulator Structures and Devices, Crimea, Ukraine, p. 79.

Bescond, M., Cavassilas, N., Asenov, A. and Lannoo, M. (2006) Effective-mass approach for n-type semiconductor nanowire MOSFET's arbitrary oriented. In: 7 th European Workshop on ULtimate Integration of Silicon, ULIS 2006, Grenoble, France, pp. 73-76. ISBN 88-900874-0-8

Brown, A., Roy, G. and Asenov, A. (2006) Impact of Fermi level pinning at polysilicon gate grain boundaries on nano-MOSFET variability:A 3-D simulation study. In: 34th European Solid State Devices Research Conference, Montreux, Switzerland, pp. 451-454.

Brown, A., Watling, J. and Asenov, A. (2006) Intrinsic parameter fluctuations due to random grain orientation in the high-k stacks. In: 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, p. 49.

Cheng, B., Roy, S. and Asenov, A. (2006) Low power, high density CMOS 6-T SRAM cell design subject to 'atomistic' fluctuations. In: 7th European Workshop on ULtimate Integration of Silicon, ULIS 2006, Grenoble, France, pp. 33-36.

Cheng, B., Roy, S. and Asenov, A. (2006) The impact of intrinsic parameter fluctuations on decananometer circuits and circuit modelling techniques. In: Mixed Design of Integrated Circuits and System, MIXDES 2006, Gdynia, Poland, pp. 117-121. ISBN 88-900874-0-8

Cheng, B., Roy, S., Roy, G., Brown, A. and Asenov, A. (2006) Design consideration of 6-T SRAM towards the End Of Bulk CMOS Technology scaling subjected to randon dopant fluctuations. In: 34th European Solid State Devices Research Conference, Montreux, Switzerland, pp. 258-261.

Ferrari, G., Jacoboni, C., Nedialkov, M. and Asenov, A. (2006) Introducing energy broadening in semiclassical Monte Carlo simulations. In: 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, p. 17.

Ferrari, G., Watling, J., Roy, S., Barker, J. and Asenov, A. (2006) Beyond SiO2 technology: The impact of high-k dielectrics. In: 6th symposium SiO2 , advanced dielectrics and related devices : SiO2006, Palermo, Italy,

Ferrari, G., Watling, J., Roy, S., Barker, J., Zeitzoff, P., Bersuker, G. and Asenov, A. (2006) Monte Carlo study of mobility in Si devices with HfO2 based oxides. In: E-MRS IUMRS ICEM 2006, Nice, France, Symposium.

Ferrari, G., Watling, J., Roy, S., Barker, J., Zeitzoff, P., Bersuker, G. and Asenov, A. (2006) On the impact of high-k gate stacks on mobility: a Monte Carlo study including coupled SO phonon-plasmon scattering. In: 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, p. 111.

Kalna, K., Hill, R., Wilson, J., Moran, D., Long, A., Asenov, A. and Thayne, I. (2006) Monte Carlo simulation of sub-30 nm high indium implant free III-V MOSFETs for low power digital applications. In: UK III-V Compound Semiconductors 2006, Sheffield, UK, D-0-3.

Kalna, K., Wang, Q., Passlack, M. and Asenov, A. (2006) MC simulation of delta doping placement in sub 100nm implant free InGaAs MOSFETs. In: E-MRS IUMRS ICEM 2006, Nice, France, Symposium.

Kalna, K., Wilson, J., Moran, D., Hill, R., Long, A., Droopad, R., Passlack, M., Thayne, I. and Asenov, A. (2006) MC simulation of high performance InGaAs nano-MOSFETs for low power CMOS applications. In: IEEE 2006 Silicon Nanoelectronics Workshop, Honolulu, p. 13.

Kalna, K., Asenov, A. and Passlack, M. (2006) Monte Carlo simulation of implant free InGaAs MOSFET. In: Seventh International Conference on New Phenomena in Mesoscopic Structures and the Fifth International Conference on Surfaces and Interfaces of Mesoscopic Devices, Maui, Hawaii, 27 November - 2 December 2005, pp. 200-203. (doi:10.1088/1742-6596/38/1/048)

Markov, S., Brown, A., Cheng, B., Roy, G., Roy, S. and Asenov, A. (2006) 3D statistical simulation of gate leakage fluctutations due to combined interface roughness and random dopants. In: International Conference on Solid State Devices and Materials. (SSDM 2006)., Yokohama,Japan, pp. 362-363.

Martinez, A., Barker, J., Svizhenko, A., Anantram, A., Bescond, M. and Asenov, A. (2006) Development of a Full 3D NEGF Nano-CMOS simulator. In: International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2006, California,USA,

Martinez, A., Kalna, K., Barker, J. and Asenov, A. (2006) A study of the interface roughness effects in Si-nanowires using a full 3D NEGF approach. In: E-MRS IUMRS ICEM 2006, Nice, France, Symposium.

Martinez, A., Barker, J.R., Anantram, A., Svizhenko, A. and Asenov, A. (2006) Developing a full 3D NEGF simulator with random dopant and interface roughness. In: 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, pp. 215-218.

Martinez, A., Barker, J.R., Svizhenko, A., Anantram, A. and Asenov, A. (2006) The impact of random dopant aggregation in source and drain in the performance of ballistic DG nano-MOSFETs. In: IEEE 2006 Silicon Nanoelectronics Workshop, Honolulu, p. 133.

Millar, C., Roy, S. and Asenov, A. (2006) Simulation of Bio-Nano-CMOS devices. In: E-MRS IUMRS ICEM 2006, Nice, France, Symposium.

Millar, C., Roy, S., Beckstein, O., Sansom, M. and Asenov, A. (2006) Continuum versus particle simulation of model nano-pores. In: 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, p. 367.

Riddet, C., Brown, A., Alexander, C., Roy, S. and Asenov, A. (2006) Efficient density gradient quantum corrections for 3D Monte Carlo simulations. In: International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2006, California,USA,

Roy, S., Cheng, B. and Asenov, A. (2006) Impact of intrinsic parameter fluctuation in nano-CMOS devices on circuits and systems. In: International Topical Workshop on Tera- and Nano- Devices: Physics and Modelling, Aizu-Wakamatsu, Japan, pp. 24-25.

Samsudin, K., Adamu-Lema, F., Brown, A., Roy, S. and Asenov, A. (2006) Intrinsic parameter fluctuations in sub-10nm generation UTB SOI MOSFETs. In: 7 th European Workshop on ULtimate Integration of Silicon, ULIS 2006, Grenoble, France, pp. 93-96. ISBN 88-900874-0-8

Seoane, N., Garcia-Loureiro, A., Kalna, K. and Asenov, A. (2006) A 3D parallel simulation of the effect of interface charge fluctuations in HEMTs. In: 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, p. 81.

Thayne, I.G. et al. (2006) III-V MOSFETs for Digital Applications: An Overview. In: UK III-V Compound Semiconductors 2006, Sheffield, UK,

Asenov, A. (2005) Monte Carlo simulation of nanotransistors and giga circuits on HPC. In: 5th International Conference on Large-Scale Scientific Computations, Sozopol, Bulgaria,

Asenov, A. (2005) Nano CMOS devices and their integration in giga transistor chips. In: Future of Intergrated Systems - FIS, Cambridge, UK,

Barker, J., Martinez, A., Svizhenko, A., Anantram, M. and Asenov, A. (2005) Green function study of quantum transport in ultrasmall devices with embedded atomistic clusters. In: 3rd International Workshop on Progress in non-equilibrium Green functions, Kiel, Germany,

Barker, J., Watling, J., Brown, A., Roy, S., Zeitzoff, P., Bersuker, G. and Asenov, A. (2005) Monte Carlo study of coupled SO phonon-plasmon scattering in Si MOSFETs with high k dielectric gate stacks: hot electron and disorder effects. In: 14th International Conference on Nonequilibrium Carrier Dynamics in Semiconductors - HCIS, Chicago, USA,

Bescond, M., Cavassilas, N., Kalna, K., Autran, J., Lannoo, M. and Asenov, A. (2005) Simulation study of performance limits for Si, Ge, GaAs ballistic nanowire MOSFETs. In: Silicon Nanoelectronics Workshop 2005, Kyoto, Japan, pp. 8-9.

Bescond, M., Cavassilas, N., Kalna, K., Nehari, K., Raymond, L., Autran, J., Lanu, M. and Asenov, A. (2005) Ballistic transport in Si, Ge and GaAs Nanowire MOSFETs. In: IEEE International Electron Device Meeting, Washington DC, USA, pp. 533-536.

Bescond, M., Cavassilas, N., Nehari, K., Autran, J., Lannoo, M. and Asenov, A. (2005) Impact of point defects in nanowire silicon MOSFETs. In: European Solid-State Device Research Conference 2005 - ESSDERC2005, Grenoble, France,

Bescond, M., Cavassilas, N., Raymond, L. and Asenov, A. (2005) Effective masses in arbitrary oriented ballistic nanowire MOSFETS. In: 14th International Conference on Nonequilibrium Carrier Dynamics in Semiconductors - HCIS, Chicago, USA, p. 42.

Brown, A., Watling, J., Asenov, A., Bersuker, G. and Zeitzoff, P. (2005) Intrinsic parameter fluctuations in MOSFETs due to structural non-uniformity of high-kappa gate stack materials. In: SISPAD: 2005 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES, TOKYO, pp. 27-30.

Garcia-Loureiro, A., Kalna, K. and Asenov, A. (2005) New sources of intrinsic parameter fluctuations introduced by a high-k dielectric in sub-100nm Si MOSFETs. In: 18th International Conference on Noise and Fluctuations, Salamanca, Spain, pp. 239-242. ISBN 0-7354-0267-1

Kalna, K., Asenov, A. and Passlack, M. (2005) Monte Carlo simulation of implant free InGaAs MOSFETs. In: New Phenomena in Mesoscopic Structures - 7 (NPMS) and the fifth in the series of Surfaces and Interfaces of Mesoscopic Devices (SIMD), NPMS-7/SIMD-5, Maui, Hawaii,

Kalna, K., Elgaid, K., Thayne, I. and Asenov, A. (2005) Modelling of InPHEMTs with high indium content channels. In: 2005 INTERNATIONAL CONFERENCE ON INDIUM PHOSPHIDE AND RELATED MATERIALSConference proceedings - indium phosphide and related materials, NEW YORK, pp. 192-195. ISBN 1092-8669

Kalna, K., Yang, L. and Asenov, A. (2005) Fermi-dirac statistics in Monte Carlo simulations of InGaAs MOSFETs. In: 14th International Conference on Nonequilibrium Carrier Dynamics in Semiconductors - HCIS, Chicago, USA,

Kalna, K., Yang, L. and Asenov, A. (2005) Monte Carlo simulation of sub-100nm InGaAs MOSFETs for digital applications. In: European Solid-State Device Research Conference 2005 - ESSDERC2005, Grenoble, France,

Martinez, A., Barker, J., Svizhenko, A., Anantram, M., Brown, A., Biegel, B. and Asenov, A. (2005) The impact of unintentional discrete charges in a nominally undoped channel of a thin body double gate MOSFETS: Classical to full quantum simulation. In: New Phenomena in Mesoscopic Structures - 7 (NPMS) and the fifth in the series of Surfaces and Interfaces of Mesoscopic Devices (SIMD), NPMS-7/SIMD-5, Maui, Hawaii,

Martinez, A., Barker, J., Svizhenko, A., Bescond, M., Anantram, M. and Asenov, A. (2005) A 2D-NEGF quantum transport study of unintentional charges in a double gate nanotransistor. In: 14th International Conference on Nonequilibrium Carrier Dynamics in Semiconductors - HCIS, Chicago, USA,

Martinez, A., Svizhenko, A., Anantram, M., Barker, J., Brown, A. and Asenov, A. (2005) A study of the effect of interface roughness on DG MOSFET using full 2D NEGF technique. In: IEEE International Electron Device Meeting, Washington DC, USA, pp. 627-630.

Martinez, A., Svizhenko, A., Anantram, M., Barker, J., Brown, A., Biegel, B. and Asenov, A. (2005) Impact of stray charges on the characteristics of nano-DGMOSFETs in the ballistic regime: A NEGF simulation study. In: Silicon Nanoelectronics Workshop 2005, Kyoto, Japan, pp. 76-77.

Millar, C., Asenov, A., Roy, S. and Brown, A. (2005) Simulating the bio-nano-CMOS interface. In: 5th IEEE conference on Nanotechnology, Nagoya, Japan,

Riddet, C., Brown, A., Alexander, C., Watling, J., Roy, S. and Asenov, A. (2005) Impact of quantum confinement scattering on the magnitude of current fluctuations in double gate MOSFETs. In: Silicon Nanoelectronics Workshop 2005, Kyoto, Japan,

Roy, G., Adamu-Lema, F., Brown, A., Roy, S. and Asenov, A. (2005) Intrinsic parameter fluctuations in conventional MOSFETs until the end of the ITRS. In: New Phenomena in Mesoscopic Structures - 7 (NPMS) and the fifth in the series of Surfaces and Interfaces of Mesoscopic Devices (SIMD), NPMS-7/SIMD-5, Maui, Hawaii,

Roy, G., Adamu-Lema, F., Brown, A., Roy, S. and Asenov, A. (2005) Simulation of combined sources of intrinsic parameter fluctuations in 'real' 35nm MOSFET. In: European Solid-State Device Research Conference 2005 - ESSDERC2005, Grenoble, France,

Samsudin, K., Cheng, B., Brown, A., Roy, S. and Asenov, A. (2005) Impact of body thickness fluctuations in nanometer scale UTB SOI MOSFETs on SRAM cell functionality. In: 6th European Conference on ULtimate Integration of Silicon - ULIS 2005, Bologna, Italy,

Samsudin, K., Cheng, B., Brown, A.R., Roy, S. and Asenov, A. (2005) Impact of random dopant induced fluctuations on sub-15nm UTB SOI 6T SRAM cells. In: IEEE International SOI Conference, Honolulu, Hawaii, 3-6 October, pp. 60-61. ISBN 0780392124 (doi:10.1109/SOI.2005.1563533)

Samsudin, K., Cheng, B., Brown, A.R., Roy, S. and Asenov, A. (2005) UTB SOI SRAM cell stability under the influence of intrinsic parameter fluctuation. In: 35th European Solid State Device Research Conference, Grenoble, France., 12-16 September 2005, pp. 553-556. ISBN 0780392035 (doi:10.1109/ESSDER.2005.1546708)

Seone, N., Garcia-Loureiro, A., Kalna, K. and Asenov, A. (2005) Discrete doping fluctuations in the delta layer of a 50nm InP HEMT. In: MSED 2005 Modeling and Simulation of Electron Devices, Pisa, Italy,

Seone, N., Garcia-Loureiro, A., Kalna, K. and Asenov, A. (2005) Indium content fluctuations in the channel of a 120nm PHEMT. In: New Phenomena in Mesoscopic Structures - 7 (NPMS) and the fifth in the series of Surfaces and Interfaces of Mesoscopic Devices (SIMD), NPMS-7/SIMD-5, Maui, Hawaii,

Seone, N., Garcia-Loureiro, A., Kalna, K. and Asenov, A. (2005) A high performance parallel device simulator for high electron mobility transistors. In: Parallel Computing 2005, Malaga, Spain,

Watling, J., Asenov, A., Barker, J. and Roy, S. (2005) Transport in the presence of high-k dielectrics. In: Material Modelling International Workshop, London, UK,

Watling, J., Asenov, A., Barker, J. and Roy, S. (2005) The impact of the interfacial layer and structure of the k dielectric (HfO2) on device performance. In: Advanced Gate Stack Engineering Conference, Texas, USA,

Watling, J., Brown, A., Alexander, C., Ferrari, G., Barker, J., Bersuker, G., Zeitzoff, P. and Asenov, A. (2005) Electrostatic and transport variations in nano CMOS devices due to variations in high-k oxides. In: 2nd International Workshop on Advanced Gate Stack Technology, Texas, USA,

Yang, L., Watling, J., Barker, J. and Asenov, A. (2005) The impact of soft-optical phonon scattering due to high-kappa dielectrics on the performance of sub-100nm conventional and strained Si n-MOSFETs. In: Physics of Semiconductors AIP Conference Proceedings, Melville, pp. 1497-1498. ISBN 0094-243X

Adamu-Lema, F., Roy, S., Brown, A., Asenov, A. and Roy, G. (2004) Intrinsic parameter fluctuations in conventional MOSFETs at the scaling limit : a statistical study. In: International workshop on Computational Electronics, IWCE-10, West Lafayette, USA, pp. 44-45.

Alexander, C., Brown, A., Watling, J. and Asenov, A. (2004) Impact of single charge trapping in nano-MOSFETs. In: IEEE 2004 Silicon Nanoelectronics Workshop, Honolulu,

Alexander, C., Brown, A., Watling, J. and Asenov, A. (2004) Impact scattering in 'atomistic' device simulation. In: 5th European Workshop on Ultimate Integration of Silicon - ULIS04, Leuven, Belgium,

Alexander, C., Brown, A., Watling, J. and Asenov, A. (2004) Impact scattering on random dopant induced current fluctuations in devanano MOSFETs. In: Simulation of Semiconductor Processes and Devices, Munich, Germany, pp. 223-226.

Asenov, A., Roy, G., Alexander, C., Brown, A., Watling, J. and Roy, S. (2004) Quantum mechanical and transport effects in resolving discrete charges in nano-CMOS device simulation. In: 4th IEEE Conference on Nanotechnology 2004, Munich, Germany,

Cheng, B., Roy, S. and Asenov, A. (2004) Compact model strategy for studying the impact of intrinsic parameter fluctuations on circuit performance. In: 11th International Conference Mixed Design of Integrated Circuits and Systems, Szezecin, Poland, pp. 51-55.

Cheng, B., Roy, S. and Asenov, A. (2004) The impact of random dopant effects on SRAM cells. In: 30th European Solid-State Circuits Confernece ESSCIRC 2004, Leuven, Belgium, pp. 219-222.

Cheng, B., Roy, S. and Asenov, A. (2004) The impact of random doping effects on CMOS SRAM cell. In: 30th European Solid-State Circuits Conference (ESSCIRC 2004)., Leuven, Belgium, 21-23 September 2004, pp. 219-222. ISBN 0780384806 (doi:10.1109/ESSCIR.2004.1356657)

Kalna, K., Yang, L., Watling, J. and Asenov, A. (2004) 80nm InGaAs MOSFET compared to equivalent Si transistor. In: 5th European Workshop on Ultimate Integration of Silicon - ULIS04, Leuven, Belgium, pp. 159-162.

Lee, A., Brown, A., Asenov, A. and Roy, S. (2004) RTS amplitudes in decanano n-MOSFETs with conventional and high k gate stacks. In: International workshop on Computational Electronics, IWCE-10, West Lafayette, USA,

Lee, A., Brown, A.R., Asenov, A. and Roy, S. (2004) RTS amplitudes in decanano n-MOSFETs with conventional and high-k gate stacks. In: 10th International Workshop on Computational Electronics, West Lafayette, Indiana, 24-27 October, pp. 159-160. ISBN 0780386493

Millar, C., Asenov, A., Brown, A. and Roy, S. (2004) Tracking the propagation of individual ions through ion channels with nano-MOSFETs. In: International workshop on Computational Electronics, IWCE-10, West Lafayette, USA, pp. 205-206.

Riddet, C., Brown, A., Alexander, C., Watling, J., Roy, S. and Asenov, A. (2004) Scattering from body thickness fluctuations in double gate MOSFETs. An ab initio Monte Carlo simulation study. In: International workshop on Computational Electronics, IWCE-10, West Lafayette, USA, pp. 194-195.

Watling, J., Yang, L., Asenov, A., Barker, J. and Roy, S. (2004) Impact of high-k dielectric HfO2 on the mobility and device performance of sub-100nm n-MOSFETs. In: International workshop on electrical characterization and reliability of high-k devices, Austin, USA,

Watling, J., Yang, L., Barker, J. and Asenov, A. (2004) The impact of high-k dielectrics on the future performance of nano-scale MOSFETs. In: IoP Condensed Matter and Materials Physics Conference CMMP04, Warwick, UK,

Yang, L., Watling, J., Adamu-Lema, F., Asenov, A. and Barker, J. (2004) Scaling study of Si and strained Si n-MOSFETs with different high k gate stacks. In: IEEE International Electron Devices Meeting, San Francisco, USA,

Yang, L., Watling, J., Adamu-Lema, F., Asenov, A. and Barker, J. (2004) Simulations of sub-100nm strained Si MOSFETs with high k gate stacks. In: International workshop on Computational Electronics, IWCE-10, West Lafeyette, USA,

Yang, L., Watling, J., Asenov, A. and Barker, J. (2004) Performance degradation due to soft optical phonon scattering in conventional and strained Si MOSFETs with high-k gate dielectrics. In: 34th European Solid-State Device research Conference, ESSDERC, Leuven, Belgium,

Yang, L., Watling, J., Asenov, A., Barker, J. and Roy, S. (2004) Mobility and device performance in conventional and strained Si MOSFETs with high-k stack. In: International Conference on Simulation of Semiconductor Processes and Devices, SISPAD, Munich, Germany, pp. 199-202.

Yang, L., Watling, J., Asenov, A., Barker, J. and Roy, S. (2004) Sub-100nm strained Si CMOS : Device performance and circuit behavior. In: 7th International Conference on Solid State and Intergrated Circuit Technology, Beijing, China,

Yang, L., Watling, J., Barker, J. and Asenov, A. (2004) The impact of soft-optical phonon scattering due to high-k dielectrics on the performance of sub-1oonm conventional and strained Si n-MOSFETs. In: 27th International Conference on Physics of Semiconductors, ICPS04, Arizona, USA,

Yang, L., Watling, J., Wilkins, R., Barker, J. and Asenov, A. (2004) Monte-Carlo investigation of interface roughness scattering in relaxed and strained Si n-MOSFETs. In: Condensed Matter and Materials Physcis Conference - CMMP04, Warwick, UK,

Yang, L., Watling, J., Wilkins, R., Barker, J. and Asenov, A. (2004) Reduced interface roughness in sub-100nm strained Si n-MOSFETs - A Monte Carlo simulation study. In: 5th European Workshop on Ultimate Integration of Silicon - ULIS04, Leuven, Belgium, pp. 23-26.

Yang, L., Watling, J. R., Adam-Lema, F., Asenov, A. and Barker, J. R. (2004) Scaling study of Si and strained Si n-MOSFETs with different high-k gate stacks. In: IEEE International Electron Devices Meeting, San Francisco, California, 13-15 December 2004, pp. 597-600. ISBN 0780386841 (doi:10.1109/IEDM.2004.1419232)

Yang, L., Watling, J. R., Asenov, A., Barken, J. R. and Roy, S. (2004) Sub-100nm strained Si CMOS: device performance and circuit behavior. In: International Conference on Solid-State and Integrated Circuits Technology, Beijing, China, 18-21 October 2004, pp. 983-986. ISBN 078038511X (doi:10.1109/ICSICT.2004.1436670)

Alexander, C., Watling, J. and Asenov, A. (2003) Artificial carrier heating due to the introduction of ab-initio Coulomb scattering in Monte Carlo simulations. In: NPMS-6/SIMD-4 Sixth International Conference on New Phenomena in Mesoscopic Systems, and Fourth International Conference on Surfaces and Interfaces of Mesoscopic Devices, Maui, Hawaii, Maui, Hawaii,

Alexander, C., Watling, J. and Asenov, A. (2003) Mobility variations in ultra-small devices due to discrete device simulation. In: International Workshop on Computational Electronics - IWCE 9, Rome, Italy,

Alexander, C., Watling, J. and Asenov, A. (2003) Small volume mobility variations due to ionised impurity scattering. In: 13th International Conference on Nonequilibrium Carrier Dynamics - HCIS 13, Modena, Italy,

Asenov, A. (2003) Brownian approach to simulation of ionic solutions and ion permeation through protein channels. In: IVth International Association for Mathematics and Computers in Simulation - IMACS Seminar on Monte Carlo Methods, Berlin, Germany,

Asenov, A. (2003) Modeling end-of-the roadmap transistors. In: 203rd Electrochemical Society (ECS) Meeting, Paris, France, abstract n.

Brown, A., Adamu-Lema, F. and Asenov, A. (2003) Intrinsic parameter fluctuations in UTB MOSFETs induced by body thickness variations. In: Proceeding Silicon Nanoelectronics Workshop 2003, Kyoto, Japan,

Brown, A., Adamu-Lema, F. and Asenov, A. (2003) Intrinsic parameter fluctuations in nanometer scale thin body SOI devices introduced by interface roughness. In: NPMS-6/SIMD-4 Sixth International Conference on New Phenomena in Mesoscopic Systems, and Fourth International Conference on Surfaces and Interfaces of Mesoscopic Devices, Maui, Hawaii, Maui, Hawaii, pp. 32-33.

Cheng, B., Roy, S., Roy, G. and Asenov, A. (2003) Integrating 'atomistic' intrinsic parameter fluctuations into compact model circuit analysis. In: ESSDERC 2003 - European Solid-State Device Research Conference, Estoril, Portugal, pp. 437-440.

Cheng, B.J., Roy, S., Roy, G. and Asenov, A. (2003) Integrating 'atomistic', intrinsic parameter fluctuations into compact model circuit analysis. In: 33rd Conference on European Solid-State Device Research. ESSDERC '03, Estoril, Portugal, 16-18 Sep 2003, pp. 437-440. ISBN 0780379993 (doi:10.1109/ESSDERC.2003.1256907)

Garcia-Lourelo, A., Kalna, K., Asenov, A., Wilkins, R. and Lopez-Gonzalez, J. (2003) Statistic 3D simulation of intrinsic fluctuations in nanoscaled PHEMTs. In: 14th Workshop on Modeling and Simulation of Electron Devices, Barcelona, Spain, pp. 45-48.

Kalna, K., Borici, M., Yang, L. and Asenov, A. (2003) Monte Carlo simulation of III-V MOSFETs. In: 13th International Conference on Nonequilibrium Carrier Dynamics - HCIS 13, Modena, Italy,

Kaya, S., Ma, W. and Asenov, A. (2003) Design of DG-MOSFETs for High Linearity Performance. In: EDMO 2003 - Electron Devices for Microwave and Optoelectronic Applications, Florida, USA,

Kaya, S., Ma, W. and Asenov, A. (2003) Design of DG-MOSFETs for high linearity performance. In: 2003 IEEE International SOI Conference,, Athens, Ohio, USA, pp. 68-69.

Kaya, S., Ma, W. and Asenov, A. (2003) Design of DG-MOSFET's for high linearity performance. In: IEEE International SOI Conference, Newport Beach, California, 29 September - 2 October 2003, pp. 68-69. ISBN 0780378156

Lee, A., Brown, A., Asenov, A. and Roy, S. (2003) RTS noise simulations of decanano MOSFETs subject to atomic scale structure variations. In: NPMS-6/SIMD-4 Sixth International Conference on New Phenomena in Mesoscopic Systems, and Fourth International Conference on Surfaces and Interfaces of Mesoscopic Devices, Maui, Hawaii, Maui, Hawaii,

Millar, C., Asenov, A. and Roy, S. (2003) Brownian dynamics based particle mesh simulation of ionic solutions and channels. In: Proceedings Modeling and Simulation of Microsystems 2003 - MSM 03, San Francisco, USA,

Moran, D., Kalna, K., Elgaid, K., McEwan, F., McLelland, H., Zhuang, L., Thayne, I., Stanley, C. and Asenov, A. (2003) Self-aligned 0.12micron T-gate InGaAs/InAlAs HEMT technology utilizing a non-annealed contact strategy. In: ESSDERC 2003 - European Solid-State Device Research Conference, Estoril, Portugal, pp. 315-318.

Moran, D. A. J., Kalna, K., Boyd, E., McEwan, F., McLelland, H., Zhuang, L. L., Stanley, C. R., Asenov, A. and Thayne, I. (2003) Self-aligned 0.12mm T-gate In.53Ga.47As/In.52Al.48As HEMT Technology Utilising a Non Annealed Ohmic Contact Strategy. In: ESSDERC '03 : 33rd Conference on European Solid-State Device Research, Estoril, Portugal, 16-18 September 2003, pp. 315-318. ISBN 0780379993 (doi:10.1109/ESSDERC.2003.1256877)

Roy, G., Brown, A., Asenov, A. and Roy, S. (2003) Bipolar quantum corrections in resolving individual dopants in atomistic, intrinsic parameter fluctuations into compact model circuit analysis. In: NPMS-6/SIMD-4 Sixth International Conference on New Phenomena in Mesoscopic Systems, and Fourth International Conference on Surfaces and Interfaces of Mesoscopic Devices, Maui, Hawaii, Maui, Hawaii, pp. 34-35.

Roy, G., Brown, A., Asenov, A. and Roy, S. (2003) Quantum aspects of resolving discrete charges in atomistic device simulation. In: International Workshop on Computational Electronics - IWCE 9, Rome, Italy,

Roy, S., Cheng, B., Roy, G. and Asenov, A. (2003) A methodology for introducing atomistic parameter fluctutations into compact device models for circuit simulation. In: International Workshop on Computational Electronics - IWCE 9, Rome, Italy,

Watling, J., Asenov, A., Brown, A., Svizhenko, A. and Anantram, M. (2003) Direct source-to-drain tunneling and its impact on intrinsic parameter fluctuations in nanometre scale double gate MOSFETs. In: Proceedings Modeling and Simulation of Microsystems 2003 - MSM 03, San Francisco, USA,

Yang, L., Asenov, A., Watling, J., Borici, M., Barker, J., Roy, S., Elgaid, K., Thayne, I. and Hackbarth, T. (2003) Optimisation of sub 11nm Si/SiGe MODFETs for high linearity applications. In: 14th Workshop on Modeling and Simulation of Electron Devices, Barcelona, Spain, pp. 41-44.

Yang, L., Asenov, A., Watling, J., Borici, M., Barker, J., Roy, S., Elgaid, K., Thayne, I. and Hackbarth, T. (2003) Optimisation of sub 11nm Si/SiGe MODFETs for high linearity applications. In: IEEE Conference on Electron devices and solid state circuits, Hong Kong, pp. 331-344.

Yang, L., Watling, J., Borici, M., Wilkins, R., Asenov, A., Barker, J. and Roy, S. (2003) Simulation of scaled sub-100nm strained Si p-channel MOSFETs. In: International Workshop on Computational Electronics - IWCE 9, Rome, Italy,

Yang, L., Asenov, A., Borici, M., Watling, J. R., Barker, J. R., Roy, S., Elgaid, K., Thayne, I. and Hackbarth, T. (2003) Optimizations of sub-100 nm Si/SiGe MODFETs for high linearity RF applications. In: IEEE Conference on Electron Devices and Solid-State Circuits, Kowloon, Hong Kong, 16-18 December 2003, pp. 331-334. ISBN 0780377494 (doi:10.1109/EDSSC.2003.1283543)

Asenov, A. (2002) Simulation of intrinsic fluctuations in decanano PHEMTs: Present status and future challenges. In: Proceedings of Solid State Devices and Materials 2002, Nagoya, Japan, pp. 18-19.

Asenov, A., Watling, J. and Brown, A. (2002) The use of quantum potentials for confinement and tunneling in semiconductor devices. In: Modeling and simulation of microsystems ( 5th International conference), San Juan, Puerto Rico,

Asenov, A., Jaraiz, M., Roy, S., Roy, G. and Adamu-Lema, F. (2002) Integrated atomistic process and device simulation of decananometre MOSFETs. In: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2002), Kobe, Japan, 4-6 Sep 2002, pp. 87-90. ISBN 4891140275 (doi:10.1109/SISPAD.2002.1034523)

Brown, A., Asenov, A. and Watling, J. (2002) Intrinsic fluctuations in sub 10nm double-gate MOSFETs Introduced by discreteness of charge and matter. In: Proceedings Silicon Nanoelectronics Workshop 2002, Honolulu,

Kalna, K. and Asenov, A. (2002) Ballistic transport in decanano MOSFETs : Present status and future challenges. In: Proceesings of Workshop on Physical Simulation of Semiconductor Devices -13, Ilkley, UK, pp. 1-5.

Kalna, K. and Asenov, A. (2002) Breakdown mechanisms limiting the operation of double doped PHEMTs scaled into sub-100nm dimensions. In: Proceedings 4th International Conference on Advanced Semiconductor Devices and Microsystems (ASDAM 2002 ), Smolenice, Slovakia, pp. 141-144.

Kalna, K. and Asenov, A. (2002) Gate tunnelling and impact ionization in sub 100nm PHEMTs. In: Proceedings of Simulation of Semiconductor Processes and Devices 2002, Kobe, Japan, pp. 139-143.

Kalna, K. and Asenov, A. (2002) Monte Carlo modelling of first order quantum effects in deep submicron HEMTs. In: Neumann Institute for Computing winter school on Quantum simulations of complex many-body systems, Kerkrade, The Netherlands,

Kalna, K. and Asenov, A. (2002) Tunneling and impact ionization in scaled double doped PHEMTs. In: Proceedings of 32nd European Solid State Device Research Conference, pp. 303-306.

Kalna, K., Yang, L. and Asenov, A. (2002) High performance III-V MOSFETs : a dream close to reality? In: 10th International Symposium on Electron Devices for Microwave and Optoelectronic Devices, Manchester, UK, pp. 243-248.

Kalna, K. and Asenov, A. (2002) Breakdown mechanisms limiting the operation of double doped PHEMTs scaled into sub-100 nm dimensions. In: The Fourth International Conference on Advanced Semiconductor Devices and Microsystems., Smolenice Castle, Slovakia, 14-16 Octber 2002, pp. 141-144. ISBN 078037276X

Kalna, K. and Asenov, A. (2002) Gate tunnelling and impact ionisation in sub 100 nm PHEMTs. In: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2002), Kobe, Japan, 4-6 September 2002, pp. 139-142. ISBN 4891140275 (doi:10.1109/SISPAD.2002.1034536)

Kalna, K. and Asenov, A. (2002) Tunnelling and impact ionization in scaled double doped PHEMTs. In: 32nd European Solid-State Device Research Conference, Firenze, Italy, 24-26 September 2002, pp. 303-306. ISBN 8890084782

Kalna, K., Yang, L. and Asenov, A. (2002) High performance III-V MOSFETs: a dream close to reality? In: 10th IEEE International Symposium on Electron Devices for Microwave and Optoelectronic Applications., Manchester, UK, 18-19 November 2002, pp. 243-248. ISBN 0780375300

Kaya, S., Asenov, A. and Roy, S. (2002) Breakdown of universal mobility curves in sub-100nm MOSFETs. In: Proceedings Silicon Nanoelectronics Workshop 2002, Honolulu,

Slavcheva, G., Davies, J. , Brown, A. and Asenov, A. (2002) Statistics of the random potential fluctuations in the MOSFET channel. In: 26th International Conference on Physics of Semiconductors, Edinburgh, UK,

Watling, J.R., Brown, A.R., Asenov, A., Svizhenko, A. and Anantram, M.P. (2002) Simulation of direct source-to-drain tunnelling using the density gradient formalism: Non-Equilibrium Greens Function calibration. In: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2002), Kobe, Japan, 4-6 September 2002, pp. 267-270. ISBN 4891140275 (doi:10.1109/SISPAD.2002.1034569)

Watling, J., Brown, A., Asenov, A., Svizhenko, A. and Anatram, M. (2002) Simulation of direct source-to -drain tunneling using density gradient formalism: Non-equlibrium Green's function calibration. In: Proceedings of Simulation of Semiconductor Processes and Devices 2002, Kobe, Japan, pp. 267-270.

Yang, L., Watling, J., Wilkins, R., Asenov, A., Barker, J., Roy, S. and Hackbarth, T. (2002) Scaling study of Si/SiGe MOSFETs for RF applications. In: 10th International Symposium on Electron Devices for Microwave and Optoelectronic Devices ( EDMO 2002), Manchester, UK, pp. 101-106.

Yang, L., Watling, J.R., Wilkins, R.C.W., Asenov, A., Barker, J.R., Roy, S. and Hackbarth, T. (2002) Scaling study of Si/SiGe MODFETs for RF applications. In: 10th IEEE International Symposium on Electron Devices for Microwave and Optoelectronic Applications (EDMO), Manchester, UK, 18-19 November 2002, pp. 101-106. ISBN 0780375300

Asenov, A. (2001) 3D statistical simulation of intrinsic fluctuations in decanano MOSFETS induced by discrete dopants, oxide thickness fluctuations and LER. In: Simulation of Semiconductor Processes and Devices, Vienna, pp. 162-169.

Brown, A., Kaya, S., Asenov, A., Davies, J. and Linton, T. (2001) Statistical 3D simulation of line edge roughness in decanano MOSFETs. In: Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 10-11.

Kalna, K. and Asenov, A. (2001) Quantum corrections in Monte Carlo simulations of scaled pHEMTs with multiple delta doping. In: IWCE-8, Illinois, USA,

Kalna, K. and Asenov, A. (2001) Multiple delta doping in aggressively scaled PHEMTs. In: Solid-State Device Research Conference, Nuremburg, Germany, 11-13 September 2001, pp. 319-322. ISBN 2914601010

Kaya, S., Asenov, A. and Roy, S. (2001) Breakdown of Universal Mobility Curves in sub-100nm MOSFETs. In: IWCE-8, Illinois, USA,

Kaya, S., Brown, A., Asenov, A., Margot, D. and Linton, T. (2001) Analysis of statistical fluctuations due to line edge roughness in sub-0.1mm MOSFETs. In: Simulation of Semiconductor Processes and Devices 2001, pp. 78-81.

Palmer, M.J. et al. (2001) Enhanced velocity overshoot and transconductance in Si/Si(0.64)Ge(0.36)/Si pMOSFETs - predictions for deep submicron devices. In: Solid State Device Research Conference, Nuremburg, Germany, 11-13 September 2001, pp. 199-202. ISBN 2914601010

Palmer, M. et al. (2001) Enhanced velocity overshoot and transconductance in Si/SiGe/Si pMOSFETs - predictions for deep submicron devices. In: Proceeding ESSDERC 2001 - Edition Frontiers, Nuremberg, Germany, pp. 199-202.

Watling, J., Brown, A., Asenov, A. and Ferry, D. (2001) Quantum corrections in 3-D drift diffusion simulation of decanano MOSFETs using an effective potential. In: Simulation of semiconductor processes and devices, Vienna, pp. 81-85.

Asenov, A. (2000) Quantum corrections to the `atomistic' MOSFET simulation. In: 7th International Workshop on Computational Electronics, Glasgow, UK, 22-25 May 2000, pp. 10-11. ISBN 0852617046 (doi:10.1109/IWCE.2000.869895)

Asenov, A., Balasubramaniam, R., Brown, A.R., Davies, J.H. and Saini, S. (2000) Random telegraph signal amplitudes in sub 100 nm (decanano) MOSFETs: a 3D `Atomistic' simulation study. In: International Electron Devices Meeting, San Francisco, California, 10-13 December 2000, pp. 279-282. ISBN 0780364384 (doi:10.1109/IEDM.2000.904311)

Asenov, A. and Kalna, K. (2000) Effect of oxide interface roughness on the threshold voltage fluctuations in decanano MOSFETs with ultrathin gate oxides. In: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2000), Seattle, Washington, 6-8 September 2000, pp. 135-138. ISBN 0780362799 (doi:10.1109/SISPAD.2000.871226)

Kalna, K., Asenov, A., Elgaid, K. and Thayne, I. (2000) Effect of impact ionization in scaled pHEMTs. In: 8th IEEE International Symposium on High Performance Electron Devices for Microwave and Optoelectronic Applications., Glasgow, UK, 13-14 November 2000, pp. 236-241. ISBN 078036550X

Kalna, K., Asenov, A., Elgaid, K. and Thayne, I. (2000) Performance of aggressively scaled pseudomorphic HEMTs: a monte carlo simulation study. In: Third International EuroConference on Advanced Semiconductor Devices and Microsystems., Smolenice Castle, Slovakia, 16-18 October 2000, pp. 55-58. ISBN 0780359399

Kalna, K., Roy, S., Asenov, A., Elgaid, K. and Thayne, I. (2000) RF analysis of aggressively scaled pHEMTs. In: 30th European Solid-State Device Research Conference., Cork, Ireland, 11-13 September 2000, pp. 156-159. ISBN 2863322486

Watling, J.R., Barker, J.R. and Asenov, A. (2000) Soft sphere model for electron correlation and scattering in the atomistic modelling of semiconductor devices. In: International Workshop on Computational Electronics, Glasgow, UK, 22-25 May 2000, pp. 159-160. ISBN 0852617046 (doi:10.1109/IWCE.2000.869974)

Watling, J.R., Zhao, Y.P., Asenov, A. and Barker, J.R. (2000) Nonequilibrium hole transport in deep sub-micron well-tempered Si p-MOSFETs. In: 7th International Workshop on Computational Electronics, Glasgow, UK, 22-25 May 2000, pp. 66-67. ISBN 0852617046 (doi:10.1109/IWCE.2000.869925)

Zhao, Y.P. et al. (2000) Indication of Non-equilibrium Transport in SiGe p-MOSFETs. In: 30th European Solid-State Device Research Conference, Cork, Ireland, 11-13 September 2000, pp. 224-227. ISBN 2863322486

Asenov, A., Slavcheva, G., Brown, A.R., Davies, J.H. and Saini, S. (1999) Quantum mechanical enhancement of the random dopant induced threshold voltage fluctuations and lowering in sub 0.1 micron MOSFETs. In: International Electron Devices Meeting, Washington, DC, 5-8 December 1999, pp. 535-538. ISBN 0780354109 (doi:10.1109/IEDM.1999.824210)

Roy, S., Kaya, S., Asenov, A. and Barker, J.R. (1999) RF analysis methodology for Si and SiGe FETs based on transient Monte Carlo simulation. In: International Conference on Simulation of Semiconductor Processes and Devices., Kyoto, Japan, 6-8 September 1999, pp. 147-150. ISBN 4930813980 (doi:10.1109/SISPAD.1999.799282)

Asenov, A. (1998) Efficient 3D `atomistic' simulation technique for studying of random dopant induced threshold voltage lowering and fluctuations in decanano MOSFETs. In: International Workshop on Computational Electronics, Osaka, Japan, 19-21 October 1998, pp. 263-266. ISBN 0780343697 (doi:10.1109/IWCE.1998.742761)

Asenov, A. (1998) Random dopant threshold voltage fluctuations in 50 nm epitaxial channel MOSFETs: a 3D 'atomistic' simulation study. In: ESSDERC '98 : 28rd Conference on European Solid-State Devices, Bordeaux, France, 8-10 September 1998, pp. 300-303. ISBN 2863322346

Asenov, A., Brown, A.R. and Roy, S. (1998) Parallel semiconductor device simulation: from power to 'atomistic' devices. In: International Workshop on Computational Electronics, Osaka, Japan, 19-21 October 1998, pp. 58-61. ISBN 0780343697 (doi:10.1109/IWCE.1998.742707)

Babiker, S., Asenov, A., Roy, S., Barker, J.R. and Beaumont, S.P. (1998) Strain engineered InxGa1-xAs channel pHEMTs on virtual substrates: a simulation study. In: International Workshop on Computational Electronics, Osaka, Japan, 19-21 October 1998, pp. 178-181. ISBN 0780343697 (doi:10.1109/IWCE.1998.742741)

Roy, S., Kaya, S., Babiker, S., Asenov, A. and Barker, J.R. (1998) Monte Carlo investigation of optimal device architectures for SiGe FETs. In: International Workshop on Computational Electronics, Osaka, Japan, 19-21 October 1998, pp. 210-213. ISBN 0780343697 (doi:10.1109/IWCE.1998.742749)

Watling, J.R., Asenov, A. and Barker, J.R. (1998) Efficient hole transport model in warped bands for use in the simulation of Si/SiGe MOSFETs. In: International Workshop on Computational Electronics, Osaka, Japan, 19-21 October 1998, pp. 96-99. ISBN 0780343697 (doi:10.1109/IWCE.1998.742719)

Borsosfoldi, Z., Webster, D.R., Thayne, I.G., Asenov, A., Haigh, D.G. and Beaumont, S.P. (1997) Ultra-linear pseudomorphic HEMTs for wireless communications: A simulation study. In: IEEE International Symposium on Compound Semiconductors, San Diego, California, 8-11 September 1997, pp. 475-478. ISBN 0750305568 (doi:10.1109/ISCS.1998.711718)

Roy, S., Asenov, A., Babiker, S., Barker, J.R. and Beaumont, S.P. (1997) RF performance of strained Si MODFETs and MOSFETs on "virtual" SiGe substrates: A Monte Carlo study. In: European Solid-State Device Research Conference, Stuttgart, Germany, 22-24 September 1997, pp. 192-195. ISBN 2863322214

This list was generated on Sun Oct 22 16:08:27 2017 BST.