University researcher featured on IEEE publication
Published: 2 August 2011
Research by the Glasgow Device Modeling Group and University spinout company Gold Standard Solutions has been featured on the front cover of a flagship publication
Research conducted in the famous Glasgow Device Modeling Group and facilitated by simulation tools developed by Gold Standard Simulations (GSS) Ltd, a spin out company from the University, has been featured on the front cover of a special edition of the Institute of Electrical and Electronic Engineers’ flagship publication, ‘Transactions on Electron Devices’.
The special issue of the journal, guest edited by Professor Asen Asenov, the University’s James Watt chair in Electrical Engineering, was entitled ‘CMOS Variability Characterization by Simulations and Measurements’. The GSS ‘atomistic simulator GARANDTM featuring in four Glasgow papers in the special issue makes a breakthrough in tackling the problem of variability in CMOS technologies. Statistical variability is one of the main problems facing the advancement of CMOS technologies as atomic scale variations in the tiny individual transistors of the larger circuits lead to unreliability when they are put together; as the size of CMOS get smaller gets smaller, and their count on a single chip gets bigger.
Professor Asenov, the CEO of GSS and world authority on statistical CMOS variability comments: “Increasing statistical variability and reliability is a formidable threat to future scaling, but is also a great opportunity for the semiconductor companies. Understanding and controlling variability at devices and circuit level can differentiate a semiconductor company from its competitors and can provide a clear competitive advantage. GSS is your best bet when dealing with statistical CMOS variability.”
You can read the full press release here.
First published: 2 August 2011
<< Aug