Course Catalogue

Comprehensive Experiment of Modern Electronic Technology (UESTC) UESTCHN3003

  • Academic Session: 2026-27
  • School: School of Engineering
  • Credits: 8
  • Level: Level 3 (SCQF level 9)
  • Typically Offered: Semester 2
  • Available to Visiting Students: No
  • Collaborative Online International Learning: No
  • Curriculum For Life: No

Short Description

This course integrates and consolidates students' knowledge of semiconductor physics and microelectronics devices, enhances understanding of mixed signal integrated circuits, and develops design skills through 4 comprehensive hands-on experiments using modern electronic design automation (EDA) software tools. It will enable students to apply electronics theory to practice by extracting circuits from a layout, designing a circuit unit, tuning its corresponding layout, and testing an op-amp circuit design.

Timetable

Course will be delivered through experiments in laboratories at UESTCHN continuously in Semester 2.

Requirements of Entry

Mandatory Entry Requirements

None

 

Recommended Entry Requirements

None

Excluded Courses

None

Co-requisites

None

Assessment

Assessment

Laboratory practical: 75% (4 experiments assessed on laboratory reports)

Design study essay: 25%

Course Aims

This course aims to consolidate students' knowledge on microelectronic devices, enhance their understanding of integrated circuits, and develop their design skills through 4 comprehensive experiments using industry-standard EDA tools. It is also to improve the students' ability to think independently, analyse designs holistically and solve problems experimentally.

Intended Learning Outcomes of Course

By the end of this course, students will be able to:

■ Integrate knowledge of semiconductor physics, consolidate it on microelectronics and use their industry-standard EDA tools;

■ Enhance understanding of NMOS-IV characteristics, analyse mixed signal ICs, apply the knowledge to circuit sizing, and evaluate its outcome;

■ Create, and develop test skills for, a common-source amplifier, a two-stage CMOS operational amplifier, and its layout using EDA (including design rule checking and layout vs schematic tests).

Minimum Requirement for Award of Credits

No exceptions