Unique simulation software tools developed for the global semiconductor industry

The demand for ever more powerful silicon chips has driven continued miniaturisation of transistors. However, the performance of these devices is increasingly affected by atomic imperfections in their structure as they reduce in size. This problem critically affects the yield of static random-access memory (SRAM), introduces timing issues in digital circuits, restricting supply voltage scaling and increases the power dissipation. SRAM occupies more than 50% of modern silicon chips used in computers, smartphones and tablets.

Pioneering research led by Professor Asenov and the Device Modelling Group has had major impacts on the global semiconductor industry by developing an understanding and awareness of the challenge of statistical variability; and providing a novel software toolchain commercialised through spin-out company Gold Standard Simulations (GSS).

When Asenov first discussed the issue of statistical variability with the global semiconductor industry in the late 1990s, it was generally believed that transistors were sufficiently large that this would not affect performance. However, the drive for miniaturisation of semiconductor devices has revealed that statistical variability is absolutely critical to the performance of silicon chips. Asenov was the first to systematically explore the problem of statistical variability and the ramifications for the world’s electronics industry. His findings and opinions expressed through invited talks at international conferences (66 appearances since 2008), training courses run in Silicon Valley, key professional journals and the media have shaped understanding and awareness and have influenced practices in the $300 billion per year semiconductor industry.

Asenov’s Device Modelling Group developed one of the first integrated simulators of variability for Complementary Metal-Oxide-Semiconductor devices and processes, building a unique variability simulation software toolchain. From 2007-12 Asenov’s EPSRC-funded research was closely aligned to industry demands (collaborators included key figures in the semiconductor industry, such as STMicroelectronics, Infineon and NXP). Working with Synopsis Inc he developed interfaces for the Glasgow simulation tools. The GSS expertise and toolset is allowing integrated device manufacturers, foundries and fabless design companies across Europe, the Far East and the USA to gain significant competitive advantage over their competitors by reducing time to market, avoiding overdesign, increasing yield and de-risking the expensive chip design process.GSS was created in 2010 and within two years its revenue from services and licensing had grown to $1million; GSS tools were being utilised in foundries providing 75% of all semiconductor production for fabless design companies globally. In September 2014, GSS signed a multimillion dollar deal with the Silicon Valley-based semiconductor manufacturer GLOBALFOUNDRIES.


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First published: 22 September 2014