Simulating Equalisation for High-Speed Data Links
The experiments based at the LHC have been hugely successful in making discoveries and performing precision measurements with the data collected at the highest energy particle physics collider ever built. Highlights include the discovery of the Higgs particle (at ATLAS and CMS) and precision measurements constraining physics beyond the Standard Model (at LHCb).
To further our knowledge, the experiments will be upgraded to be able to take data at even higher luminosity to significantly increase the available statistics. The LHCb experiment will be upgraded in 2018 to use the full luminosity of the present LHC. In 2023 ATLAS will be upgraded at the same time that the LHC machine is replaced by the High Luminosity LHC, with an order of magnitude higher luminosity.
Both these upgrades result in order of magnitude increases in interaction rate in the experiments. To take advantage of this the experiments' data recording and transmission rates must be similarly increased. The data rates expected from the LHCb and ATLAS silicon pixel detector systems are predicted to be 5 Gb/s, which is unprecedented in particle physics experiments. This data must be transmitted electrically for a number of meters before being converted into an optical signal. Such data rates make broadband speeds seem rather lacklustre with the faster package (Virgin fibre optic) boasting a pitiful 200 Mb/s.
The development of the highly performant data transmission cables is being led by the Glasgow group for both the LHCb and ATLAS experiments as well as testing the full link performance. At the moment we have a set-up which allows us to test full links: chip (velopix), cables, flexes, opto-box and vacuum feed-through. According to the characterization results, in order to be able to recover data from the detector due to the losses introduced by different items of the link we must include in the link a new ASIC, an equalizer. The purpose of this equalizer is to counteract the losses of the link. The idea is that we would like a flat frequency response of the electrical transmission link; however the high frequencies are attenuated by the link so we try to boost them by this chip.
The project will consist in simulating different conceptual designs of equalizers and then testing how commercial equalizers perform in the full link which requires a general knowledge of a transmission chain. It is a hands-on project that combines computer simulations with hardware so it will be a great way of understanding signal integrity fundaments.
Project Type: Measurements, simulations and data analysis
Prerequisites: Interest in electronics is beneficial but not required
Preferred Dates: Mid-June to end-July
Main Supervisor: Richard Bates
Second Supervisor: Leyre Flores