Dr Haiping Zhou
- Research Technologist (Electronic and Nanoscale Engineering)
telephone: 01413303236
email: Haiping.Zhou@glasgow.ac.uk
2011
Bentley, S. et al. (2011) Electron mobility in surface- and buried- channel flatband In0.53Ga0.47As MOSFETs with ALD Al2O3 gate dielectric. IEEE Electron Device Letters, 32 (4). pp. 494-496. ISSN 0741-3106 (doi:10.1109/LED.2011.2107876)
2010
Taking, S. et al. (2010) Surface passivation of AlN/GaN MOS-HEMTs using ultra-thin Al2O3 formed by thermal oxidation of evaporated aluminium. Electronics Letters, 46 (4). pp. 301-302. ISSN 0013-5194 (doi:10.1049/el.2010.2781)
Li, X., Bentley, S. , Holland, M.C. , Zhou, H. , Thoms, S. , Macintyre, D.S. , and Thayne, I.G. (2010) A low damage fully self-aligned gate-last process for fabricating sub-100 nm gate length enhancement mode GaAs MOSFETs. In: 54th International Conference on Electron, Ion and Photon Beam Technology and Nanofabrication, June 2010, Anchorage, USA.
Li, X., Bentley, S. , McLelland, H., Holland, M. , Zhou, H. , Thoms, S. , Macintyre, D.S. , and Thayne, I. (2010) Low damage fully self-aligned replacement gate process for fabricating deep sub-100 nm gate length GaAs metal-oxide-semiconductor field-effect transistors. Journal of Vacuum Science and Technology. Part B. Microelectronics and Nanometer Structures, 28 (6). ISSN 1071-1023 (doi:10.1116/1.3501355)
Li, X., Zhou, H. , Hill, R.J.W., Longo, P. , Holland, M. , and Thayne, I.G. (2010) Dry etching device quality high-kappa GaxGdyOz gate oxide in SiCl4 chemistry for low resistance ohmic contact realisation in fabricating III-V MOSFETs. Microelectronic Engineering, 87 (5-8). pp. 1587-1589. ISSN 0167-9317 (doi:10.1016/j.mee.2009.11.011)
Li, X., Bentley, S. , McLelland, H. , Holland, M. , Zhou, H. , Thoms, S. , Macintyre, D. , and Thayne, I. (2010) Low damage fully self-aligned replacement gate process for fabricating deep sub-100 nm gate length GaAs metal-oxide-semiconductor field-effect transistors. Journal of Vacuum Science and Technology. Part B. Microelectronics and Nanometer Structures, 28 (6). C6L1. ISSN 1071-1023 (doi:10.1116/1.3501355)
Taking, S., Banerjee, A. , Zhou, H. , Li, X. , MacFarlane, D., Dabiran, A., and Wasige, E. (2010) Thin Al2O3 Formed by Thermal Oxidation of Evaporated Aluminium for AlN/GaN MOS-HEMT Technology. In: UKNC Conference, 12th and 13th January , Cork, Ireland.
2009
Krasa, D., Wilkinson, C.D.W. , Gadegaard, N. , Kong, X., Zhou, H. , Roberts, A.P., Muxworthy, A.R., and Williams, W. (2009) Nanofabrication of two-dimensional arrays of magnetite particles for fundamental rock magnetic studies. Journal of Geophysical Research. Solid Earth, 114 (B02104). ISSN 0148-0227 (doi:10.1029/2008JB006017)
Li, X., Hill, R.J.W. , Longo, P. , Holland, M.C. , Zhou, H. , Thoms, S. , Macintyre, D.S. , and Thayne, I.G. (2009) Fully self-aligned process for fabricating 100 nm gate length enhancement mode GaAs metal-oxide-semiconductor field-effect transistors. Journal of Vacuum Science and Technology. Part B. Microelectronics and Nanometer Structures, 27 (6). pp. 3153-3157. ISSN 1071-1023 (doi:10.1116/1.3256624)
Thayne, I.G. et al. (2009) Review of current status of III-V MOSFETs. ECS Transactions, 19 (5). pp. 275-286. ISSN 1938-5862 (doi:10.1149/1.3119552)
2008
Hill, R.J.W. et al. (2008) 1 μm gate length, In0.75Ga0.25As channel, thin body n-MOSFET on InP substrate with transconductance of 737μS/μm. Electronics Letters, 44 . pp. 498-500. ISSN 0013-5194 (doi:10.1049/el:20080470)
Hill, R. J. W. et al. (2008) 1 mu m gate length, In0.75Ga0.25As channel, thin body n-MOSFET on InP substrate with transconductance of 737 mu S/mm. Electronics Letters, 44 (7). pp. 498-499. ISSN 0013-5194 (doi:10.1049/el:20080470)
Hill, R.J.W., Moran, D.A.J. , Li, X. , Zhou, H. , Macintyre, D.S. , Thoms, S. , Asenov, A. , and Thayne, I.G. (2008) Ino.75Gao.25As channel III–V MOSFETs with leading performance metrics. In: Proceedings of the IEEE Silicon Nanoelectronics Workshop, 15-16 June 2008, Honolulu, Hawaii. IEEE Computer Society, Piscataway, N.J., USA. ISBN 9781424420711
Kalna, K. et al. (2008) III-V MOSFETs for digital applications with silicon co-integration. In: International Conference on Advanced Semiconductor Devices and Microsystems: 12-16 October 2008, Smolenice, Slovakia. IEEE Computer Society, Piscataway, N.J., USA, pp. 39-46. ISBN 9781424423255
Kong, X., Krasa, D., Zhou, H. P. , Williams, W., McVitie, S. , Weaver, J. M. R. , and Wilkinson, C. D. W. (2008) Very high resolution etching of magnetic nanostructures in organic gases. Microelectronic Engineering, 85 (5-6). pp. 988-991. ISSN 0167-9317 (doi:10.1016/j.mee.2007.12.006)
Li, X., Hill, R.J.W. , Zhou, H P. , Wilkinson, C.D.W. , and Thayne, I.G. (2008) A low damage Si3N4 sidewall spacer process for self-aligned sub-100 nm III-V MOSFETs. Microelectronic Engineering, 85 (5-6). pp. 996-999. ISSN 0167-9317 (doi:10.1016/j.mee.2007.12.064)
Li, X., Zhou, H.P. , Abrokwah, J., Zurcher, P., Rajagopalan, K., Liu, W., Gregory, R., Passlack, M., and Thayne, I.G. (2008) Low damage ashing and etching processes for ion implanted resist and Si3N4 removal by ICP and RIE methods. Microelectronic Engineering, 85 (5-6). pp. 966-968. ISSN 0167-9317 (doi:10.1016/j.mee.2007.12.056)
2007
Hill, R.J.W. et al. (2007) Enhancement-mode GaAs MOSFETs with an In0.3Ga0.7As channel, a mobility of over 5000 cm2/V · s, and transconductance of Over 475 μS/μm. IEEE Electron Device Letters, 284 (12). pp. 1080-1082. ISSN 0741-3106 (doi:10.1109/LED.2007.910009)
Passlack, M. et al. (2007) High mobility III-V MOSFETs for RF and digital applications. In: IEEE International Electron Devices Meeting (IEDM 2007), 10-12 December 2007, Washington DC, USA.
Hill, R.J.W., Moran, D.A.J. , Li, X., Zhou, H. , Macintyre, D. , Thoms, S. , Droopad, R., Passlack, M., and Thayne, I.G. (2007) 180 nm metal gate, high-k dielectric, implant free III-V MOSFETs with transconductance of over 425μS/μm. Electronics Letters, 43 . pp. 543-545. ISSN 0013-5194 (doi:10.1049/el:20070427)
Moran, D.A.J. et al. (2007) Sub-micron, metal gate, high-к dielectric, implant-free, enhancement-mode III-V MOSFETs. In: 37th European Solid State Device Research Conference (ESSDERC 2007), 11-13 September 2007, Munich, Germany.
Rajagopalan, K. et al. (2007) Enhancement mode n-MOSFET with high-k dielectric on GaAs substrate. In: IEEE 65th Annual Device Research Conference, 18-20 June 2007, South Bend, Indiana, USA.
2006
Li, X, Hill, R , Zhou, H , and Wilkinson, CDW (2006) GaxGdyOz dry etching processes for the fabrication of III-V MOSFET. In: UK III-V Compound Semiconductors 2006, Sheffield, UK.
Li, X, Hill, R , Zhou, H , Wilkinson, CDW , and Thayne, IG (2006) A low damage RIE SiN sidewall spacer process for self-aligned sub-100nm III-V MOSFETs. In: UK III-V Compound Semiconductors 2006, Sheffield, UK.
Li, X, Zhou, H , Cao, X, Wilkinson, CDW , and Thayne, IG (2006) Low damage dry etching processes for the fabrication of compound semiconductor based transistors with sub-100nm tungsten gates. In: UK III-V Compound Semiconductors 2006, Sheffield, UK.
Li, X, Zhou, H , Hill, R , Wilkinson, CDW , and Thayne, IG (2006) Dry etching of a device quality high-k GaxGdyOz oxide in CH4/H2-O2 chemistry for the fabrication of III-V MOSFETs. In: 32nd International Conference on Micro-and Nano-Engineering 2006, Barcelona, Spain.
Thayne, IG et al. (2006) III-V MOSFETs for Digital Applications: an overview. In: UK III-V Compound Semiconductors 2006, Sheffield, UK.
2005
Elgaid, K, Zhou, H , Wilkinson, CDW , and Thayne, IG (2005) Room temperature deposited Si3N4 characterization and applications in MMICs. In: 8th International symposium on Silicon Nitride and Silicon dioxide thin insulating films and emerging dielectrics, Quebec, Canada.
Li, X, Cao, X, Zhou, H , Wilkinson, CDW , Thoms, S , Macintyre, DS , Holland, MC , and Thayne, IG (2005) 30nm tungsten gates etched by a low damage ICP etching for the fabrication of compound semiconductor transistors. In: 31st International Conference on Micro and Nano-Engineering 2005, Vienna, Austria.
Li, X, Cao, X, Zhou, H , Wilkinson, CDW , Thoms, S , Macintyre, DS , Holland, MC , and Thayne, IG (2005) A low damage RIE process for the fabrication of cmpound semiconductor based transistors wtih sub-100nm tungsten gates. In: 31st International Conference on Micro and Nano-Engineering 2005, Vienna, Austria.
2004
Boyd, E, Zhou, H , McLelland, H , Moran, DAJ , Thoms, S , and Thayne, IG (2004) Fabrication of 30nm T-gate high electron mobility transistors using bi-layer of PMMA and UVIII. In: Conference on Optoelectronic and Microelectronic materials and devices 2004, Brisbane, Australia.
Boyd, E., Zhou, H. , McLelland, H. , Moran, D.A.J. , Thoms, S. , and Thayne, I.G. (2004) Fabrication of 30nm T-gate high electron mobility transistors using a bi-Layer of PMMA and UVIII. In: 2004 IEEE Conference on Optoelectronic and Microelectronic Materials and Devices, 8-10 December 2004, Brisbane, Australia.
Elgaid, K, McLelland, H , Cao, X, Boyd, E, Moran, DAJ , Thoms, S , Zhou, H , Wilkinson, CDW , Stanley, CR , and Thayne, IG (2004) An array-based design methodology for the realisation of 94GHz MMMIC amplifiers. In: European Gallium Arsenide and other Compound Semiconductors Application Symposium,GaAs 2004, Amsterdam, The Netherlands.
Elgaid, K, Zhou, H , Wilkinson, CDW , and Thayne, IG (2004) Low temperature high density highly uniform Si3N4 technology for passive and active devices in MMMIC applications. In: GaAs Mantech 2004, Tampa, USA.
2003
Elgaid, K, Zhou, H , Wilkinson, CDW , and Thayne, IG (2003) Low temperature high density Si3N4 MIM capacitors technology for MMIC and RF-MEMs applications. In: Microelectronic and Nanoelectronic Engineering, Cambridge, UK.
Zhou, H, Sim, C, Hodson, C, Kinsey, R, and Wilkinson, CDW (2003) Deposition of ammonia-free silicon nitride using inductively coupled plasma at low temperature. In: 16th International Symposium on Plasma Chemistry, Sicily, Italy.
